Home
last modified time | relevance | path

Searched refs:disp_int (Results 1 – 10 of 10) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/radeon/
Drs600.c715 rdev->irq.stat_regs.r500.disp_int = RREG32(R_007EDC_DISP_INTERRUPT_STATUS); in rs600_irq_ack()
716 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
720 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
724 if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
729 if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
735 rdev->irq.stat_regs.r500.disp_int = 0; in rs600_irq_ack()
775 !rdev->irq.stat_regs.r500.disp_int && in rs600_irq_process()
780 rdev->irq.stat_regs.r500.disp_int || in rs600_irq_process()
787 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_process()
796 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_process()
[all …]
Dr600.c3914 rdev->irq.stat_regs.r600.disp_int = RREG32(DCE3_DISP_INTERRUPT_STATUS); in r600_irq_ack()
3925 rdev->irq.stat_regs.r600.disp_int = RREG32(DISP_INTERRUPT_STATUS); in r600_irq_ack()
3938 if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT) in r600_irq_ack()
3940 if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VLINE_INTERRUPT) in r600_irq_ack()
3942 if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VBLANK_INTERRUPT) in r600_irq_ack()
3944 if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VLINE_INTERRUPT) in r600_irq_ack()
3946 if (rdev->irq.stat_regs.r600.disp_int & DC_HPD1_INTERRUPT) { in r600_irq_ack()
3957 if (rdev->irq.stat_regs.r600.disp_int & DC_HPD2_INTERRUPT) { in r600_irq_ack()
4132 if (!(rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT)) in r600_irq_process()
4142 rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VBLANK_INTERRUPT; in r600_irq_process()
[all …]
Devergreen.c4612 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in evergreen_irq_ack() local
4616 disp_int[i] = RREG32(evergreen_disp_int_status[i]); in evergreen_irq_ack()
4631 if (disp_int[j] & LB_D1_VBLANK_INTERRUPT) in evergreen_irq_ack()
4634 if (disp_int[j] & LB_D1_VLINE_INTERRUPT) in evergreen_irq_ack()
4641 if (disp_int[i] & DC_HPD1_INTERRUPT) in evergreen_irq_ack()
4646 if (disp_int[i] & DC_HPD1_RX_INTERRUPT) in evergreen_irq_ack()
4699 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in evergreen_irq_process() local
4771 if (!(disp_int[crtc_idx] & mask)) { in evergreen_irq_process()
4776 disp_int[crtc_idx] &= ~mask; in evergreen_irq_process()
4809 if (!(disp_int[hpd_idx] & mask)) in evergreen_irq_process()
[all …]
Dsi.c6144 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in si_irq_ack() local
6151 disp_int[i] = RREG32(si_disp_int_status[i]); in si_irq_ack()
6165 if (disp_int[j] & LB_D1_VBLANK_INTERRUPT) in si_irq_ack()
6168 if (disp_int[j] & LB_D1_VLINE_INTERRUPT) in si_irq_ack()
6175 if (disp_int[i] & DC_HPD1_INTERRUPT) in si_irq_ack()
6180 if (disp_int[i] & DC_HPD1_RX_INTERRUPT) in si_irq_ack()
6243 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in si_irq_process() local
6314 if (!(disp_int[crtc_idx] & mask)) { in si_irq_process()
6319 disp_int[crtc_idx] &= ~mask; in si_irq_process()
6352 if (!(disp_int[hpd_idx] & mask)) in si_irq_process()
[all …]
Dcik.c7300 rdev->irq.stat_regs.cik.disp_int = RREG32(DISP_INTERRUPT_STATUS); in cik_irq_ack()
7331 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT) in cik_irq_ack()
7333 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT) in cik_irq_ack()
7374 if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT) { in cik_irq_ack()
7404 if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_RX_INTERRUPT) { in cik_irq_ack()
7595 if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT)) in cik_irq_process()
7605 rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VBLANK_INTERRUPT; in cik_irq_process()
7610 if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT)) in cik_irq_process()
7613 rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VLINE_INTERRUPT; in cik_irq_process()
7785 if (!(rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT)) in cik_irq_process()
[all …]
Dradeon.h753 u32 disp_int; member
758 u32 disp_int; member
768 u32 disp_int[6]; member
774 u32 disp_int; member
/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Ddce_v8_0.c3007 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v8_0_crtc_irq() local
3013 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v8_0_crtc_irq()
3024 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v8_0_crtc_irq()
3119 uint32_t disp_int, mask, tmp; in dce_v8_0_hpd_irq() local
3128 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v8_0_hpd_irq()
3131 if (disp_int & mask) { in dce_v8_0_hpd_irq()
Ddce_v6_0.c2912 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v6_0_crtc_irq() local
2918 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v6_0_crtc_irq()
2929 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v6_0_crtc_irq()
3024 uint32_t disp_int, mask, tmp; in dce_v6_0_hpd_irq() local
3033 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v6_0_hpd_irq()
3036 if (disp_int & mask) { in dce_v6_0_hpd_irq()
Ddce_v11_0.c3321 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v11_0_crtc_irq() local
3327 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v11_0_crtc_irq()
3339 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v11_0_crtc_irq()
3359 uint32_t disp_int, mask; in dce_v11_0_hpd_irq() local
3368 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v11_0_hpd_irq()
3371 if (disp_int & mask) { in dce_v11_0_hpd_irq()
Ddce_v10_0.c3195 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v10_0_crtc_irq() local
3200 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v10_0_crtc_irq()
3212 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v10_0_crtc_irq()
3232 uint32_t disp_int, mask; in dce_v10_0_hpd_irq() local
3241 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v10_0_hpd_irq()
3244 if (disp_int & mask) { in dce_v10_0_hpd_irq()