Searched refs:ctrlreg_value (Results 1 – 1 of 1) sorted by relevance
220 unsigned char ctrlreg_value; member4018 info->port_array[0]->ctrlreg_value |= (BIT0 << (info->port_num * 2)); in enable_loopback()4441 info->port_array[0]->ctrlreg_value |= (BIT0 << (info->port_num * 2)); in async_mode()4618 info->port_array[0]->ctrlreg_value |= (BIT0 << (info->port_num * 2)); in hdlc_mode()4620 info->port_array[0]->ctrlreg_value &= ~(BIT0 << (info->port_num * 2)); in hdlc_mode()4767 info->port_array[0]->ctrlreg_value &= ~EnableBit; in set_signals()4769 info->port_array[0]->ctrlreg_value |= EnableBit; in set_signals()5188 info->ctrlreg_value = 0xaa; in init_adapter()5567 *RegAddr = info->port_array[0]->ctrlreg_value; in write_control_reg()
