Searched refs:ctrl_bit (Results 1 – 3 of 3) sorted by relevance
| /Linux-v4.19/drivers/net/ethernet/hisilicon/hns3/hns3pf/ |
| D | hclge_mdio.c | 39 u8 ctrl_bit; member
69 hnae3_set_bit(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_START_B, 1); in hclge_mdio_write()
70 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_ST_M, in hclge_mdio_write()
72 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_OP_M, in hclge_mdio_write()
107 hnae3_set_bit(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_START_B, 1); in hclge_mdio_read()
108 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_ST_M, in hclge_mdio_read()
110 hnae3_set_field(mdio_cmd->ctrl_bit, HCLGE_MDIO_CTRL_OP_M, in hclge_mdio_read()
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| /Linux-v4.19/drivers/gpu/drm/omapdrm/dss/ |
| D | dss.c | 490 u8 ctrl_bit = ctrl_bits[channel]; in dss_lcd_clk_mux_dra7() local
495 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_dra7()
503 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_dra7()
523 u8 ctrl_bit = ctrl_bits[channel]; in dss_lcd_clk_mux_omap5() local
527 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap5()
534 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap5()
552 u8 ctrl_bit = ctrl_bits[channel]; in dss_lcd_clk_mux_omap4() local
556 REG_FLD_MOD(dss, DSS_CONTROL, 0, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap4()
563 REG_FLD_MOD(dss, DSS_CONTROL, 1, ctrl_bit, ctrl_bit); in dss_lcd_clk_mux_omap4()
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| /Linux-v4.19/drivers/net/ethernet/netronome/nfp/nfpcore/ |
| D | nfp_nsp_eth.c | 492 unsigned int val, const u64 ctrl_bit) in nfp_eth_set_bit_config() argument
516 entries[idx].control |= cpu_to_le64(ctrl_bit); in nfp_eth_set_bit_config()
523 #define NFP_ETH_SET_BIT_CONFIG(nsp, raw_idx, mask, val, ctrl_bit) \ argument
527 val, ctrl_bit); \
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