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Searched refs:csr_addr (Results 1 – 9 of 9) sorted by relevance

/Linux-v4.19/drivers/crypto/qat/qat_common/
Dadf_hw_arbiter.c62 #define WRITE_CSR_ARB_RINGSRVARBEN(csr_addr, index, value) \ argument
63 ADF_CSR_WR(csr_addr, ADF_ARB_RINGSRVARBEN_OFFSET + \
66 #define WRITE_CSR_ARB_SARCONFIG(csr_addr, index, value) \ argument
67 ADF_CSR_WR(csr_addr, ADF_ARB_OFFSET + \
70 #define WRITE_CSR_ARB_WRK_2_SER_MAP(csr_addr, index, value) \ argument
71 ADF_CSR_WR(csr_addr, (ADF_ARB_OFFSET + \
75 #define WRITE_CSR_ARB_WQCFG(csr_addr, index, value) \ argument
76 ADF_CSR_WR(csr_addr, (ADF_ARB_OFFSET + \
82 void __iomem *csr = accel_dev->transport->banks[0].csr_addr; in adf_init_arb()
111 WRITE_CSR_ARB_RINGSRVARBEN(ring->bank->csr_addr, in adf_update_ring_arb()
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Dadf_transport.c104 WRITE_CSR_INT_COL_EN(bank->csr_addr, bank->bank_number, bank->irq_mask); in adf_enable_ring_irq()
105 WRITE_CSR_INT_COL_CTL(bank->csr_addr, bank->bank_number, in adf_enable_ring_irq()
114 WRITE_CSR_INT_COL_EN(bank->csr_addr, bank->bank_number, bank->irq_mask); in adf_disable_ring_irq()
131 WRITE_CSR_RING_TAIL(ring->bank->csr_addr, ring->bank->bank_number, in adf_send_message()
153 WRITE_CSR_RING_HEAD(ring->bank->csr_addr, in adf_handle_response()
163 WRITE_CSR_RING_CONFIG(ring->bank->csr_addr, ring->bank->bank_number, in adf_configure_tx_ring()
174 WRITE_CSR_RING_CONFIG(ring->bank->csr_addr, ring->bank->bank_number, in adf_configure_rx_ring()
210 WRITE_CSR_RING_BASE(ring->bank->csr_addr, ring->bank->bank_number, in adf_init_ring()
320 WRITE_CSR_RING_CONFIG(bank->csr_addr, bank->bank_number, in adf_remove_ring()
322 WRITE_CSR_RING_BASE(bank->csr_addr, bank->bank_number, in adf_remove_ring()
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Dadf_transport_internal.h78 void __iomem *csr_addr; member
Dadf_transport_debug.c89 void __iomem *csr = ring->bank->csr_addr; in adf_ring_show()
214 void __iomem *csr = bank->csr_addr; in adf_bank_show()
Dqat_hal.c453 void __iomem *csr_addr = in qat_hal_init_esram() local
462 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram()
466 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram()
468 ADF_CSR_WR(csr_addr, 0, csr_val); in qat_hal_init_esram()
472 csr_val = ADF_CSR_RD(csr_addr, 0); in qat_hal_init_esram()
Dadf_vf_isr.c227 WRITE_CSR_INT_FLAG_AND_COL(bank->csr_addr, bank->bank_number, in adf_isr()
Dadf_isr.c98 WRITE_CSR_INT_FLAG_AND_COL(bank->csr_addr, bank->bank_number, 0); in adf_msix_isr_bundle()
/Linux-v4.19/arch/mips/include/asm/octeon/
Dcvmx.h266 static inline void cvmx_write_csr(uint64_t csr_addr, uint64_t val) in cvmx_write_csr() argument
268 cvmx_write64(csr_addr, val); in cvmx_write_csr()
276 if (((csr_addr >> 40) & 0x7ffff) == (0x118)) in cvmx_write_csr()
280 static inline void cvmx_writeq_csr(void __iomem *csr_addr, uint64_t val) in cvmx_writeq_csr() argument
282 cvmx_write_csr((__force uint64_t)csr_addr, val); in cvmx_writeq_csr()
291 static inline uint64_t cvmx_read_csr(uint64_t csr_addr) in cvmx_read_csr() argument
293 uint64_t val = cvmx_read64(csr_addr); in cvmx_read_csr()
297 static inline uint64_t cvmx_readq_csr(void __iomem *csr_addr) in cvmx_readq_csr() argument
299 return cvmx_read_csr((__force uint64_t) csr_addr); in cvmx_readq_csr()
308 static inline void cvmx_read_csr_async(uint64_t scraddr, uint64_t csr_addr) in cvmx_read_csr_async() argument
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Docteon-model.h314 static inline uint64_t cvmx_read_csr(uint64_t csr_addr);