Searched refs:crtc_base (Results 1 – 12 of 12) sorted by relevance
| /Linux-v4.19/drivers/gpu/drm/radeon/ |
| D | rv770.c | 804 void rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async) in rv770_page_flip() argument
818 WREG32(D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); in rv770_page_flip()
819 WREG32(D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); in rv770_page_flip()
821 WREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); in rv770_page_flip()
822 WREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); in rv770_page_flip()
825 (u32)crtc_base); in rv770_page_flip()
827 (u32)crtc_base); in rv770_page_flip()
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| D | rs600.c | 113 void rs600_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async) in rs600_page_flip() argument
127 (u32)crtc_base); in rs600_page_flip()
129 (u32)crtc_base); in rs600_page_flip()
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| D | radeon_asic.h | 141 u64 crtc_base, bool async);
253 u64 crtc_base, bool async);
467 void rv770_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base,
538 u64 crtc_base, bool async);
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| D | evergreen.c | 1414 void evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, in evergreen_page_flip() argument
1423 upper_32_bits(crtc_base)); in evergreen_page_flip()
1425 (u32)crtc_base); in evergreen_page_flip()
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| D | r100.c | 156 void r100_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base, bool async) in r100_page_flip() argument
159 u32 tmp = ((u32)crtc_base) | RADEON_CRTC_OFFSET__OFFSET_LOCK; in r100_page_flip()
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| D | radeon.h | 1997 void (*page_flip)(struct radeon_device *rdev, int crtc, u64 crtc_base, bool async);
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| /Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_mode.h | 282 int crtc_id, u64 crtc_base, bool async);
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| D | dce_virtual.c | 58 int crtc_id, u64 crtc_base, bool async) in dce_virtual_page_flip() argument
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| D | dce_v8_0.c | 180 int crtc_id, u64 crtc_base, bool async) in dce_v8_0_page_flip() argument
189 upper_32_bits(crtc_base)); in dce_v8_0_page_flip()
192 lower_32_bits(crtc_base)); in dce_v8_0_page_flip()
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| D | dce_v6_0.c | 185 int crtc_id, u64 crtc_base, bool async) in dce_v6_0_page_flip() argument
194 upper_32_bits(crtc_base)); in dce_v6_0_page_flip()
196 (u32)crtc_base); in dce_v6_0_page_flip()
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| D | dce_v11_0.c | 250 int crtc_id, u64 crtc_base, bool async) in dce_v11_0_page_flip() argument
262 upper_32_bits(crtc_base)); in dce_v11_0_page_flip()
265 lower_32_bits(crtc_base)); in dce_v11_0_page_flip()
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| D | dce_v10_0.c | 232 int crtc_id, u64 crtc_base, bool async) in dce_v10_0_page_flip() argument
244 upper_32_bits(crtc_base)); in dce_v10_0_page_flip()
247 lower_32_bits(crtc_base)); in dce_v10_0_page_flip()
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