Searched refs:cp_hqd_pq_control (Results 1 – 11 of 11) sorted by relevance
200 m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE | in __update_mqd()204 m->cp_hqd_pq_control |= PQ_ATC_EN; in __update_mqd()212 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; in __update_mqd()222 m->cp_hqd_pq_control |= NO_UPDATE_RPTR; in __update_mqd()385 m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE | in update_mqd_hiq()394 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; in update_mqd_hiq()
175 m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT; in update_mqd()176 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; in update_mqd()177 pr_debug("cp_hqd_pq_control 0x%x\n", m->cp_hqd_pq_control); in update_mqd()216 m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK | in update_mqd()281 m->cp_hqd_pq_control |= 1 << CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT | in init_mqd_hiq()
168 m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT | in __update_mqd()171 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; in __update_mqd()172 pr_debug("cp_hqd_pq_control 0x%x\n", m->cp_hqd_pq_control); in __update_mqd()215 m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK | in __update_mqd()284 m->cp_hqd_pq_control |= 1 << CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT | in init_mqd_hiq()
96 uint32_t cp_hqd_pq_control; member
306 uint32_t cp_hqd_pq_control; member
2822 u32 cp_hqd_pq_control; member2935 mqd->cp_hqd_pq_control = RREG32(mmCP_HQD_PQ_CONTROL); in gfx_v7_0_mqd_init()2936 mqd->cp_hqd_pq_control &= in gfx_v7_0_mqd_init()2940 mqd->cp_hqd_pq_control |= in gfx_v7_0_mqd_init()2942 mqd->cp_hqd_pq_control |= in gfx_v7_0_mqd_init()2945 mqd->cp_hqd_pq_control |= in gfx_v7_0_mqd_init()2948 mqd->cp_hqd_pq_control &= in gfx_v7_0_mqd_init()2952 mqd->cp_hqd_pq_control |= in gfx_v7_0_mqd_init()
461 2 << REG_GET_FIELD(m->cp_hqd_pq_control, in kgd_hqd_load()
2787 mqd->cp_hqd_pq_control = tmp; in gfx_v9_0_mqd_init()2897 mqd->cp_hqd_pq_control); in gfx_v9_0_kiq_init_register()
4775 mqd->cp_hqd_pq_control = tmp; in gfx_v8_0_mqd_init()
4461 u32 cp_hqd_pq_control; member4668 mqd->queue_state.cp_hqd_pq_control = RREG32(CP_HQD_PQ_CONTROL); in cik_cp_compute_resume()4669 mqd->queue_state.cp_hqd_pq_control &= in cik_cp_compute_resume()4672 mqd->queue_state.cp_hqd_pq_control |= in cik_cp_compute_resume()4674 mqd->queue_state.cp_hqd_pq_control |= in cik_cp_compute_resume()4677 mqd->queue_state.cp_hqd_pq_control |= BUF_SWAP_32BIT; in cik_cp_compute_resume()4679 mqd->queue_state.cp_hqd_pq_control &= in cik_cp_compute_resume()4681 mqd->queue_state.cp_hqd_pq_control |= in cik_cp_compute_resume()4683 WREG32(CP_HQD_PQ_CONTROL, mqd->queue_state.cp_hqd_pq_control); in cik_cp_compute_resume()
