Searched refs:cp_hdr (Results 1 – 5 of 5) sorted by relevance
324 const struct gfx_firmware_header_v1_0 *cp_hdr = NULL; in amdgpu_ucode_init_single_fw() local337 cp_hdr = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_single_fw()355 le32_to_cpu(cp_hdr->jt_size) * 4; in amdgpu_ucode_init_single_fw()362 ucode->ucode_size = le32_to_cpu(cp_hdr->jt_size) * 4; in amdgpu_ucode_init_single_fw()366 le32_to_cpu(cp_hdr->jt_offset) * 4), in amdgpu_ucode_init_single_fw()456 const struct gfx_firmware_header_v1_0 *cp_hdr; in amdgpu_ucode_init_bo() local457 cp_hdr = (const struct gfx_firmware_header_v1_0 *)ucode->fw->data; in amdgpu_ucode_init_bo()460 fw_offset += ALIGN(le32_to_cpu(cp_hdr->jt_size) << 2, PAGE_SIZE); in amdgpu_ucode_init_bo()
492 const struct gfx_firmware_header_v1_0 *cp_hdr; in gfx_v9_0_init_microcode() local525 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; in gfx_v9_0_init_microcode()526 adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v9_0_init_microcode()527 adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v9_0_init_microcode()536 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; in gfx_v9_0_init_microcode()537 adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v9_0_init_microcode()538 adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v9_0_init_microcode()547 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; in gfx_v9_0_init_microcode()548 adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v9_0_init_microcode()549 adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v9_0_init_microcode()[all …]
314 const struct gfx_firmware_header_v1_0 *cp_hdr; in gfx_v6_0_init_microcode() local345 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; in gfx_v6_0_init_microcode()346 adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v6_0_init_microcode()347 adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v6_0_init_microcode()356 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; in gfx_v6_0_init_microcode()357 adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v6_0_init_microcode()358 adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v6_0_init_microcode()367 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; in gfx_v6_0_init_microcode()368 adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v6_0_init_microcode()369 adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v6_0_init_microcode()
968 const struct gfx_firmware_header_v1_0 *cp_hdr; in gfx_v8_0_init_microcode() local1022 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; in gfx_v8_0_init_microcode()1023 adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v8_0_init_microcode()1024 adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v8_0_init_microcode()1042 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; in gfx_v8_0_init_microcode()1043 adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v8_0_init_microcode()1045 adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v8_0_init_microcode()1063 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.ce_fw->data; in gfx_v8_0_init_microcode()1064 adev->gfx.ce_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v8_0_init_microcode()1065 adev->gfx.ce_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v8_0_init_microcode()[all …]
62 u32 cp_pay, u32 cp_hdr) in set_dynamic_sa_command_1() argument75 sa->sa_command_1.bf.copy_hdr = cp_hdr; in set_dynamic_sa_command_1()
