Searched refs:com_hsclk_sel (Results 1 – 1 of 1) sorted by relevance
52 u32 com_hsclk_sel; member297 cfg->com_hsclk_sel = (0x20 | pd.hsclk_divsel); in pll_calculate()369 DBG("com_hsclk_sel = 0x%x", cfg->com_hsclk_sel); in pll_calculate()467 cfg.com_hsclk_sel); in hdmi_8996_pll_set_clk_rate()
