Searched refs:clock_table (Results 1 – 7 of 7) sorted by relevance
437 struct SMU8_Fusion_ClkTable *clock_table; in smu8_upload_pptable_to_smu() local462 clock_table = (struct SMU8_Fusion_ClkTable *)table; in smu8_upload_pptable_to_smu()479 clock_table->SclkBreakdownTable.ClkLevel[i].GnbVid = in smu8_upload_pptable_to_smu()481 clock_table->SclkBreakdownTable.ClkLevel[i].Frequency = in smu8_upload_pptable_to_smu()485 clock_table->SclkBreakdownTable.ClkLevel[i].Frequency, in smu8_upload_pptable_to_smu()488 clock_table->SclkBreakdownTable.ClkLevel[i].DfsDid = in smu8_upload_pptable_to_smu()492 clock_table->SclkBreakdownTable.ClkLevel[i].GfxVid = in smu8_upload_pptable_to_smu()496 clock_table->AclkBreakdownTable.ClkLevel[i].GfxVid = in smu8_upload_pptable_to_smu()498 clock_table->AclkBreakdownTable.ClkLevel[i].Frequency = in smu8_upload_pptable_to_smu()502 clock_table->AclkBreakdownTable.ClkLevel[i].Frequency, in smu8_upload_pptable_to_smu()[all …]
418 DpmClocks_t *table = &(smu10_data->clock_table); in smu10_populate_clock_table()430 &smu10_data->clock_table.DcefClocks[0]); in smu10_populate_clock_table()433 &smu10_data->clock_table.SocClocks[0]); in smu10_populate_clock_table()436 &smu10_data->clock_table.FClocks[0]); in smu10_populate_clock_table()439 &smu10_data->clock_table.MemClocks[0]); in smu10_populate_clock_table()
411 struct phm_clock_array *clock_table; in get_valid_clk() local414 clock_table = kzalloc(table_size, GFP_KERNEL); in get_valid_clk()415 if (NULL == clock_table) in get_valid_clk()418 clock_table->count = (unsigned long)table->count; in get_valid_clk()420 for (i = 0; i < clock_table->count; i++) in get_valid_clk()421 clock_table->values[i] = (unsigned long)table->entries[i].clk; in get_valid_clk()423 *ptable = clock_table; in get_valid_clk()
296 DpmClocks_t clock_table; member
388 u32 *clock_table[NUM_ATA_CLOCKS]; member424 .clock_table = {437 .clock_table = {624 return info->timings->clock_table[info->clock][i]; in get_speed_setting()1058 if (chip_type >= HPT374 || info->timings->clock_table[clock] == NULL) { in init_chipset_hpt366()1074 if (info->timings->clock_table[clock] == NULL) { in init_chipset_hpt366()
314 static u8 clock_table[] = { F81866_UART_CLK_1_8432MHZ, in fintek_8250_set_termios() local354 clock_table[i]); in fintek_8250_set_termios()
187 static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ, variable583 port_priv->shadow_clk |= clock_table[idx]; in f81534_set_port_config()
