| /Linux-v4.19/drivers/memory/ |
| D | ti-aemif.c | 126 unsigned long clk_rate; member
182 unsigned long clk_rate = aemif->clk_rate; in aemif_config_abus() local
188 ta = aemif_calc_rate(pdev, data->ta, clk_rate, TA_MAX); in aemif_config_abus()
189 rhold = aemif_calc_rate(pdev, data->rhold, clk_rate, RHOLD_MAX); in aemif_config_abus()
190 rstrobe = aemif_calc_rate(pdev, data->rstrobe, clk_rate, RSTROBE_MAX); in aemif_config_abus()
191 rsetup = aemif_calc_rate(pdev, data->rsetup, clk_rate, RSETUP_MAX); in aemif_config_abus()
192 whold = aemif_calc_rate(pdev, data->whold, clk_rate, WHOLD_MAX); in aemif_config_abus()
193 wstrobe = aemif_calc_rate(pdev, data->wstrobe, clk_rate, WSTROBE_MAX); in aemif_config_abus()
194 wsetup = aemif_calc_rate(pdev, data->wsetup, clk_rate, WSETUP_MAX); in aemif_config_abus()
220 static inline int aemif_cycles_to_nsec(int val, unsigned long clk_rate) in aemif_cycles_to_nsec() argument
[all …]
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| /Linux-v4.19/drivers/clocksource/ |
| D | timer-oxnas-rps.c | 141 ulong clk_rate = clk_get_rate(rps->clk); in oxnas_rps_clockevent_init() local
146 rps->timer_period = DIV_ROUND_UP(clk_rate, HZ); in oxnas_rps_clockevent_init()
147 timer_rate = clk_rate; in oxnas_rps_clockevent_init()
151 timer_rate = clk_rate / 16; in oxnas_rps_clockevent_init()
156 timer_rate = clk_rate / 256; in oxnas_rps_clockevent_init()
178 clk_rate, in oxnas_rps_clockevent_init()
196 ulong clk_rate = clk_get_rate(rps->clk); in oxnas_rps_clocksource_init() local
200 clk_rate = clk_rate / 16; in oxnas_rps_clocksource_init()
208 TIMER_BITS, clk_rate); in oxnas_rps_clocksource_init()
211 clk_rate, 250, TIMER_BITS, in oxnas_rps_clocksource_init()
[all …]
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| D | vf_pit_timer.c | 163 unsigned long clk_rate; in pit_timer_init() local
192 clk_rate = clk_get_rate(pit_clk); in pit_timer_init()
193 cycle_per_jiffy = clk_rate / (HZ); in pit_timer_init()
198 ret = pit_clocksource_init(clk_rate); in pit_timer_init()
202 return pit_clockevent_init(clk_rate, irq); in pit_timer_init()
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| /Linux-v4.19/drivers/watchdog/ |
| D | loongson1_wdt.c | 27 unsigned long clk_rate; member
49 counts = drvdata->clk_rate * min(timeout, max_hw_heartbeat); in ls1x_wdt_set_timeout()
90 unsigned long clk_rate; in ls1x_wdt_probe() local
113 clk_rate = clk_get_rate(drvdata->clk); in ls1x_wdt_probe()
114 if (!clk_rate) { in ls1x_wdt_probe()
118 drvdata->clk_rate = clk_rate; in ls1x_wdt_probe()
125 ls1x_wdt->max_hw_heartbeat_ms = U32_MAX / clk_rate * 1000; in ls1x_wdt_probe()
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| D | imgpdc_wdt.c | 119 unsigned long clk_rate = clk_get_rate(wdt->wdt_clk); in __pdc_wdt_set_timeout() local
123 val |= order_base_2(wdt->wdt_dev.timeout * clk_rate) - 1; in __pdc_wdt_set_timeout()
185 unsigned long clk_rate; in pdc_wdt_probe() local
223 clk_rate = clk_get_rate(pdc_wdt->wdt_clk); in pdc_wdt_probe()
224 if (clk_rate == 0) { in pdc_wdt_probe()
230 if (order_base_2(clk_rate) > PDC_WDT_CONFIG_DELAY_MASK + 1) { in pdc_wdt_probe()
236 if (order_base_2(clk_rate) == 0) in pdc_wdt_probe()
245 do_div(div, clk_rate); in pdc_wdt_probe()
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| D | tangox_wdt.c | 43 unsigned long clk_rate; member
60 ticks = 1 + wdt->timeout * dev->clk_rate; in tangox_wdt_start()
85 return (count - 1) / dev->clk_rate; in tangox_wdt_get_timeleft()
135 dev->clk_rate = clk_get_rate(dev->clk); in tangox_wdt_probe()
136 if (!dev->clk_rate) { in tangox_wdt_probe()
146 dev->wdt.max_hw_heartbeat_ms = (U32_MAX - 1) / dev->clk_rate; in tangox_wdt_probe()
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| D | lpc18xx_wdt.c | 58 unsigned long clk_rate; member
110 val = DIV_ROUND_UP(lpc18xx_wdt->wdt_dev.timeout * lpc18xx_wdt->clk_rate, in __lpc18xx_wdt_set_timeout()
132 return (val * LPC18XX_WDT_CLK_DIV) / lpc18xx_wdt->clk_rate; in lpc18xx_wdt_get_timeleft()
244 lpc18xx_wdt->clk_rate = clk_get_rate(lpc18xx_wdt->wdt_clk); in lpc18xx_wdt_probe()
245 if (lpc18xx_wdt->clk_rate == 0) { in lpc18xx_wdt_probe()
255 LPC18XX_WDT_CLK_DIV, lpc18xx_wdt->clk_rate); in lpc18xx_wdt_probe()
258 LPC18XX_WDT_CLK_DIV) / lpc18xx_wdt->clk_rate; in lpc18xx_wdt_probe()
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| D | orion_wdt.c | 71 unsigned long clk_rate; member
90 dev->clk_rate = clk_get_rate(dev->clk); in orion_wdt_clock_init()
113 dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO; in armada370_wdt_clock_init()
133 dev->clk_rate = clk_get_rate(dev->clk); in armada375_wdt_clock_init()
152 dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO; in armada375_wdt_clock_init()
176 dev->clk_rate = clk_get_rate(dev->clk); in armadaxp_wdt_clock_init()
184 writel(dev->clk_rate * wdt_dev->timeout, in orion_wdt_ping()
195 writel(dev->clk_rate * wdt_dev->timeout, in armada375_start()
220 writel(dev->clk_rate * wdt_dev->timeout, in armada370_start()
242 writel(dev->clk_rate * wdt_dev->timeout, in orion_start()
[all …]
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| D | renesas_wdt.c | 38 DIV_ROUND_UP((d) * (p)->clk_rate, clk_divs[(p)->cks])
41 #define DIV_BY_CLKS_PER_SEC(p, d) ((d) * clk_divs[(p)->cks] / (p)->clk_rate)
53 unsigned long clk_rate; member
202 priv->clk_rate = clk_get_rate(clk); in rwdt_probe()
207 if (!priv->clk_rate) { in rwdt_probe()
213 clks_per_sec = priv->clk_rate / clk_divs[i]; in rwdt_probe()
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| /Linux-v4.19/drivers/pwm/ |
| D | pwm-omap-dmtimer.c | 51 static u32 pwm_omap_dmtimer_get_clock_cycles(unsigned long clk_rate, int ns) in pwm_omap_dmtimer_get_clock_cycles() argument
53 return DIV_ROUND_CLOSEST_ULL((u64)clk_rate * ns, NSEC_PER_SEC); in pwm_omap_dmtimer_get_clock_cycles()
103 unsigned long clk_rate; in pwm_omap_dmtimer_config() local
123 clk_rate = clk_get_rate(fclk); in pwm_omap_dmtimer_config()
124 if (!clk_rate) { in pwm_omap_dmtimer_config()
129 dev_dbg(chip->dev, "clk rate: %luHz\n", clk_rate); in pwm_omap_dmtimer_config()
147 period_cycles = pwm_omap_dmtimer_get_clock_cycles(clk_rate, period_ns); in pwm_omap_dmtimer_config()
148 duty_cycles = pwm_omap_dmtimer_get_clock_cycles(clk_rate, duty_ns); in pwm_omap_dmtimer_config()
153 period_ns, clk_rate); in pwm_omap_dmtimer_config()
160 duty_ns, clk_rate); in pwm_omap_dmtimer_config()
[all …]
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| D | pwm-lpss-pci.c | 22 .clk_rate = 25000000,
29 .clk_rate = 19200000,
36 .clk_rate = 19200000,
44 .clk_rate = 19200000,
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| D | pwm-sun4i.c | 111 u64 clk_rate, tmp; in sun4i_pwm_get_state() local
115 clk_rate = clk_get_rate(sun4i_pwm->clk); in sun4i_pwm_get_state()
142 state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate); in sun4i_pwm_get_state()
145 state->period = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate); in sun4i_pwm_get_state()
152 u64 clk_rate, div = 0; in sun4i_pwm_calculate() local
155 clk_rate = clk_get_rate(sun4i_pwm->clk); in sun4i_pwm_calculate()
166 div = clk_rate * state->period + NSEC_PER_SEC / 2; in sun4i_pwm_calculate()
178 div = clk_rate; in sun4i_pwm_calculate()
197 state->period = DIV_ROUND_CLOSEST_ULL(div, clk_rate); in sun4i_pwm_calculate()
200 state->duty_cycle = DIV_ROUND_CLOSEST_ULL(div, clk_rate); in sun4i_pwm_calculate()
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| D | pwm-lpss-platform.c | 23 .clk_rate = 25000000,
30 .clk_rate = 19200000,
37 .clk_rate = 19200000,
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| D | pwm-rockchip.c | 69 unsigned long clk_rate; in rockchip_pwm_get_state() local
78 clk_rate = clk_get_rate(pc->clk); in rockchip_pwm_get_state()
82 state->period = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate); in rockchip_pwm_get_state()
86 state->duty_cycle = DIV_ROUND_CLOSEST_ULL(tmp, clk_rate); in rockchip_pwm_get_state()
109 u64 clk_rate, div; in rockchip_pwm_config() local
112 clk_rate = clk_get_rate(pc->clk); in rockchip_pwm_config()
119 div = clk_rate * state->period; in rockchip_pwm_config()
123 div = clk_rate * state->duty_cycle; in rockchip_pwm_config()
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| /Linux-v4.19/arch/mips/jz4740/ |
| D | time.c | 131 uint32_t clk_rate; in plat_time_init() local
141 clk_rate = clk_get_rate(ext_clk) >> 4; in plat_time_init()
144 jz4740_jiffies_per_tick = DIV_ROUND_CLOSEST(clk_rate, HZ); in plat_time_init()
146 clockevent_set_clock(&jz4740_clockevent, clk_rate); in plat_time_init()
155 ret = clocksource_register_hz(&jz4740_clocksource, clk_rate); in plat_time_init()
160 sched_clock_register(jz4740_read_sched_clock, 16, clk_rate); in plat_time_init()
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| /Linux-v4.19/arch/m68k/include/asm/ |
| D | mcfclk.h | 33 #define DEFINE_CLK(clk_bank, clk_name, clk_slot, clk_rate) \ argument
37 .rate = clk_rate, \
44 #define DEFINE_CLK(clk_ref, clk_name, clk_rate) \ argument
47 .rate = clk_rate, \
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| /Linux-v4.19/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_core_perf.c | 319 u64 clk_rate = kms->perf.perf_tune.min_core_clk; in _dpu_core_perf_get_core_clk_rate() local
326 clk_rate = max(dpu_cstate->new_perf.core_clk_rate, in _dpu_core_perf_get_core_clk_rate()
327 clk_rate); in _dpu_core_perf_get_core_clk_rate()
328 clk_rate = clk_round_rate(kms->perf.core_clk->clk, in _dpu_core_perf_get_core_clk_rate()
329 clk_rate); in _dpu_core_perf_get_core_clk_rate()
334 clk_rate = kms->perf.fix_core_clk_rate; in _dpu_core_perf_get_core_clk_rate()
336 DPU_DEBUG("clk:%llu\n", clk_rate); in _dpu_core_perf_get_core_clk_rate()
338 return clk_rate; in _dpu_core_perf_get_core_clk_rate()
346 u64 clk_rate = 0; in dpu_core_perf_crtc_update() local
440 clk_rate = _dpu_core_perf_get_core_clk_rate(kms); in dpu_core_perf_crtc_update()
[all …]
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| /Linux-v4.19/drivers/mfd/ |
| D | intel-lpss-acpi.c | 31 .clk_rate = 120000000,
36 .clk_rate = 100000000,
47 .clk_rate = 133000000,
59 .clk_rate = 133000000,
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| D | intel-lpss-pci.c | 67 .clk_rate = 120000000,
76 .clk_rate = 120000000,
88 .clk_rate = 120000000,
94 .clk_rate = 100000000,
98 .clk_rate = 100000000,
111 .clk_rate = 133000000,
123 .clk_rate = 133000000,
128 .clk_rate = 216000000,
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| /Linux-v4.19/drivers/nvmem/ |
| D | imx-ocotp.c | 176 unsigned long clk_rate = 0; in imx_ocotp_set_imx6_timing() local
186 clk_rate = clk_get_rate(priv->clk); in imx_ocotp_set_imx6_timing()
188 relax = clk_rate / (1000000000 / DEF_RELAX) - 1; in imx_ocotp_set_imx6_timing()
189 strobe_prog = clk_rate / (1000000000 / 10000) + 2 * (DEF_RELAX + 1) - 1; in imx_ocotp_set_imx6_timing()
190 strobe_read = clk_rate / (1000000000 / 40) + 2 * (DEF_RELAX + 1) - 1; in imx_ocotp_set_imx6_timing()
201 unsigned long clk_rate = 0; in imx_ocotp_set_imx7_timing() local
208 clk_rate = clk_get_rate(priv->clk); in imx_ocotp_set_imx7_timing()
209 fsource = DIV_ROUND_UP_ULL((u64)clk_rate * DEF_FSOURCE, in imx_ocotp_set_imx7_timing()
211 strobe_prog = DIV_ROUND_CLOSEST_ULL((u64)clk_rate * DEF_STROBE_PROG, in imx_ocotp_set_imx7_timing()
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| D | vf610-ocotp.c | 124 u32 clk_rate; in vf610_ocotp_calculate_timing() local
128 clk_rate = clk_get_rate(ocotp_dev->clk); in vf610_ocotp_calculate_timing()
131 relax = clk_rate / (1000000000 / DEF_RELAX) - 1; in vf610_ocotp_calculate_timing()
132 strobe_prog = clk_rate / (1000000000 / 10000) + 2 * (DEF_RELAX + 1) - 1; in vf610_ocotp_calculate_timing()
133 strobe_read = clk_rate / (1000000000 / 40) + 2 * (DEF_RELAX + 1) - 1; in vf610_ocotp_calculate_timing()
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| D | lpc18xx_eeprom.c | 170 unsigned long clk_rate; in lpc18xx_eeprom_probe() local
220 clk_rate = clk_get_rate(eeprom->clk); in lpc18xx_eeprom_probe()
221 clk_rate = DIV_ROUND_UP(clk_rate, LPC18XX_EEPROM_CLOCK_HZ) - 1; in lpc18xx_eeprom_probe()
222 lpc18xx_eeprom_writel(eeprom, LPC18XX_EEPROM_CLKDIV, clk_rate); in lpc18xx_eeprom_probe()
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| /Linux-v4.19/drivers/phy/st/ |
| D | phy-stm32-usbphyc.c | 86 static void stm32_usbphyc_get_pll_params(u32 clk_rate, in stm32_usbphyc_get_pll_params() argument
104 do_div(ndiv, (clk_rate * 2)); in stm32_usbphyc_get_pll_params()
108 do_div(frac, (clk_rate * 2)); in stm32_usbphyc_get_pll_params()
116 u32 clk_rate = clk_get_rate(usbphyc->clk); in stm32_usbphyc_pll_init() local
120 if ((clk_rate < PLL_INFF_MIN_RATE_HZ) || in stm32_usbphyc_pll_init()
121 (clk_rate > PLL_INFF_MAX_RATE_HZ)) { in stm32_usbphyc_pll_init()
123 clk_rate); in stm32_usbphyc_pll_init()
127 stm32_usbphyc_get_pll_params(clk_rate, &pll_params); in stm32_usbphyc_pll_init()
139 clk_rate, FIELD_GET(PLLNDIV, usbphyc_pll), in stm32_usbphyc_pll_init()
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| /Linux-v4.19/drivers/usb/phy/ |
| D | phy-generic.c | 213 u32 clk_rate = 0; in usb_phy_gen_create_phy() local
219 if (of_property_read_u32(node, "clock-frequency", &clk_rate)) in usb_phy_gen_create_phy()
220 clk_rate = 0; in usb_phy_gen_create_phy()
235 clk_rate = pdata->clk_rate; in usb_phy_gen_create_phy()
270 if (!IS_ERR(nop->clk) && clk_rate) { in usb_phy_gen_create_phy()
271 err = clk_set_rate(nop->clk, clk_rate); in usb_phy_gen_create_phy()
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| /Linux-v4.19/drivers/gpu/drm/arc/ |
| D | arcpgu_crtc.c | 71 long rate, clk_rate = mode->clock * 1000; in arc_pgu_crtc_mode_valid() local
72 long diff = clk_rate / 200; /* +-0.5% allowed by HDMI spec */ in arc_pgu_crtc_mode_valid()
74 rate = clk_round_rate(arcpgu->clk, clk_rate); in arc_pgu_crtc_mode_valid()
75 if ((max(rate, clk_rate) - min(rate, clk_rate) < diff) && (rate > 0)) in arc_pgu_crtc_mode_valid()
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