Searched refs:clk_cfg (Results 1 – 5 of 5) sorted by relevance
228 unsigned int clk_cfg; in ep93xx_i2s_set_dai_fmt() local232 clk_cfg = ep93xx_i2s_read_reg(info, EP93XX_I2S_RXCLKCFG); in ep93xx_i2s_set_dai_fmt()236 clk_cfg |= EP93XX_I2S_CLKCFG_REL; in ep93xx_i2s_set_dai_fmt()240 clk_cfg &= ~EP93XX_I2S_CLKCFG_REL; in ep93xx_i2s_set_dai_fmt()244 clk_cfg &= ~EP93XX_I2S_CLKCFG_REL; in ep93xx_i2s_set_dai_fmt()256 clk_cfg |= EP93XX_I2S_CLKCFG_MASTER; in ep93xx_i2s_set_dai_fmt()261 clk_cfg &= ~EP93XX_I2S_CLKCFG_MASTER; in ep93xx_i2s_set_dai_fmt()271 clk_cfg &= ~(EP93XX_I2S_CLKCFG_CKP | EP93XX_I2S_CLKCFG_LRS); in ep93xx_i2s_set_dai_fmt()276 clk_cfg &= ~EP93XX_I2S_CLKCFG_CKP; in ep93xx_i2s_set_dai_fmt()277 clk_cfg |= EP93XX_I2S_CLKCFG_LRS; in ep93xx_i2s_set_dai_fmt()[all …]
208 u8 clk_cfg, reg; in bcm63xx_spi_setup_transfer() local212 clk_cfg = SPI_CLK_0_391MHZ; in bcm63xx_spi_setup_transfer()217 clk_cfg = bcm63xx_spi_freq_table[i][1]; in bcm63xx_spi_setup_transfer()225 reg |= clk_cfg; in bcm63xx_spi_setup_transfer()229 clk_cfg, t->speed_hz); in bcm63xx_spi_setup_transfer()
601 u32 clk_cfg; in rp2_reset_asic() local609 clk_cfg = readw(base + RP2_ASIC_CFG); in rp2_reset_asic()610 clk_cfg = (clk_cfg & ~BIT(8)) | BIT(9); in rp2_reset_asic()611 writew(clk_cfg, base + RP2_ASIC_CFG); in rp2_reset_asic()
56 static struct ath10k_wcn3990_clk_info clk_cfg[] = { variable1163 for (i = 0; i < ARRAY_SIZE(clk_cfg); i++) { in ath10k_wcn3990_clk_init()1211 for (i = 0; i < ARRAY_SIZE(clk_cfg); i++) { in ath10k_wcn3990_clk_deinit()1331 ar_snoc->clk = clk_cfg; in ath10k_snoc_probe()1332 for (i = 0; i < ARRAY_SIZE(clk_cfg); i++) { in ath10k_snoc_probe()
409 u8 clk_cfg; member464 return cs35l35_clk_ctl[i].clk_cfg; in cs35l35_get_clk_config()
