/Linux-v4.19/drivers/dma/ |
D | pch_dma.c | 120 #define channel_writel(pdc, name, val) \ macro 345 channel_writel(pd_chan, DEV_ADDR, desc->regs.dev_addr); in pdc_dostart() 346 channel_writel(pd_chan, MEM_ADDR, desc->regs.mem_addr); in pdc_dostart() 347 channel_writel(pd_chan, SIZE, desc->regs.size); in pdc_dostart() 348 channel_writel(pd_chan, NEXT, desc->regs.next); in pdc_dostart() 351 channel_writel(pd_chan, NEXT, desc->txd.phys); in pdc_dostart() 784 channel_writel(pd_chan, DEV_ADDR, pd->ch_regs[i].dev_addr); in pch_dma_restore_regs() 785 channel_writel(pd_chan, MEM_ADDR, pd->ch_regs[i].mem_addr); in pch_dma_restore_regs() 786 channel_writel(pd_chan, SIZE, pd->ch_regs[i].size); in pch_dma_restore_regs() 787 channel_writel(pd_chan, NEXT, pd->ch_regs[i].next); in pch_dma_restore_regs()
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D | idma64.c | 71 channel_writel(idma64c, CFG_LO, cfglo); in idma64_chan_init() 72 channel_writel(idma64c, CFG_HI, cfghi); in idma64_chan_init() 101 channel_writel(idma64c, CTL_HI, IDMA64C_CTLH_BLOCK_TS(~0UL)); in idma64_chan_start() 102 channel_writel(idma64c, CTL_LO, IDMA64C_CTLL_LLP_S_EN | IDMA64C_CTLL_LLP_D_EN); in idma64_chan_start() 434 channel_writel(idma64c, CFG_LO, cfglo | IDMA64C_CFGL_CH_SUSP); in idma64_chan_deactivate() 446 channel_writel(idma64c, CFG_LO, cfglo & ~IDMA64C_CFGL_CH_SUSP); in idma64_chan_activate()
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D | at_hdmac.c | 246 channel_writel(atchan, SADDR, 0); in atc_dostart() 247 channel_writel(atchan, DADDR, 0); in atc_dostart() 248 channel_writel(atchan, CTRLA, 0); in atc_dostart() 249 channel_writel(atchan, CTRLB, 0); in atc_dostart() 250 channel_writel(atchan, DSCR, first->txd.phys); in atc_dostart() 251 channel_writel(atchan, SPIP, ATC_SPIP_HOLE(first->src_hole) | in atc_dostart() 253 channel_writel(atchan, DPIP, ATC_DPIP_HOLE(first->dst_hole) | in atc_dostart() 1606 channel_writel(atchan, CFG, cfg); in atc_alloc_chan_resources() 2104 channel_writel(atchan, SADDR, 0); in atc_resume_cyclic() 2105 channel_writel(atchan, DADDR, 0); in atc_resume_cyclic() [all …]
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D | txx9dmac.c | 57 #define channel_writel(dc, name, val) \ macro 316 channel_writel(dc, CCR, TXX9_DMA_CCR_CHRST); in txx9dmac_reset_chan() 322 channel_writel(dc, CHAR, 0); in txx9dmac_reset_chan() 323 channel_writel(dc, SAR, 0); in txx9dmac_reset_chan() 324 channel_writel(dc, DAR, 0); in txx9dmac_reset_chan() 326 channel_writel(dc, CNTR, 0); in txx9dmac_reset_chan() 327 channel_writel(dc, SAIR, 0); in txx9dmac_reset_chan() 328 channel_writel(dc, DAIR, 0); in txx9dmac_reset_chan() 329 channel_writel(dc, CCR, 0); in txx9dmac_reset_chan() 523 channel_writel(dc, CSR, errors); in txx9dmac_handle_error()
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D | idma64.h | 167 #define channel_writel(idma64c, reg, value) \ macro
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D | at_hdmac_regs.h | 277 #define channel_writel(atchan, name, val) \ macro
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/Linux-v4.19/drivers/dma/dw/ |
D | core.c | 157 channel_writel(dwc, CFG_LO, cfglo); in dwc_initialize_chan_idma32() 158 channel_writel(dwc, CFG_HI, cfghi); in dwc_initialize_chan_idma32() 173 channel_writel(dwc, CFG_LO, cfglo); in dwc_initialize_chan_dw() 174 channel_writel(dwc, CFG_HI, cfghi); in dwc_initialize_chan_dw() 262 channel_writel(dwc, SAR, lli_read(desc, sar)); in dwc_do_single_block() 263 channel_writel(dwc, DAR, lli_read(desc, dar)); in dwc_do_single_block() 264 channel_writel(dwc, CTL_LO, ctllo); in dwc_do_single_block() 265 channel_writel(dwc, CTL_HI, lli_read(desc, ctlhi)); in dwc_do_single_block() 312 channel_writel(dwc, LLP, first->txd.phys | lms); in dwc_dostart() 313 channel_writel(dwc, CTL_LO, DWC_CTLL_LLP_D_EN | DWC_CTLL_LLP_S_EN); in dwc_dostart() [all …]
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D | regs.h | 291 #define channel_writel(dwc, name, val) \ macro
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