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Searched refs:ch_regs (Results 1 – 10 of 10) sorted by relevance

/Linux-v4.19/drivers/dma/
Dtegra210-adma.c110 struct tegra_adma_chan_regs ch_regs; member
342 struct tegra_adma_chan_regs *ch_regs; in tegra_adma_start() local
357 ch_regs = &desc->ch_regs; in tegra_adma_start()
361 tdma_ch_write(tdc, ADMA_CH_TC, ch_regs->tc); in tegra_adma_start()
362 tdma_ch_write(tdc, ADMA_CH_CTRL, ch_regs->ctrl); in tegra_adma_start()
363 tdma_ch_write(tdc, ADMA_CH_LOWER_SRC_ADDR, ch_regs->src_addr); in tegra_adma_start()
364 tdma_ch_write(tdc, ADMA_CH_LOWER_TRG_ADDR, ch_regs->trg_addr); in tegra_adma_start()
365 tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_regs->fifo_ctrl); in tegra_adma_start()
366 tdma_ch_write(tdc, ADMA_CH_CONFIG, ch_regs->config); in tegra_adma_start()
470 residual = desc->ch_regs.tc; in tegra_adma_tx_status()
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Dtegra20-apb-dma.c157 struct tegra_dma_channel_regs ch_regs; member
453 struct tegra_dma_channel_regs *ch_regs = &sg_req->ch_regs; in tegra_dma_start() local
455 tdc_write(tdc, TEGRA_APBDMA_CHAN_CSR, ch_regs->csr); in tegra_dma_start()
456 tdc_write(tdc, TEGRA_APBDMA_CHAN_APBSEQ, ch_regs->apb_seq); in tegra_dma_start()
457 tdc_write(tdc, TEGRA_APBDMA_CHAN_APBPTR, ch_regs->apb_ptr); in tegra_dma_start()
458 tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBSEQ, ch_regs->ahb_seq); in tegra_dma_start()
459 tdc_write(tdc, TEGRA_APBDMA_CHAN_AHBPTR, ch_regs->ahb_ptr); in tegra_dma_start()
461 tdc_write(tdc, TEGRA_APBDMA_CHAN_WCOUNT, ch_regs->wcount); in tegra_dma_start()
465 ch_regs->csr | TEGRA_APBDMA_CSR_ENB); in tegra_dma_start()
499 tdc_write(tdc, TEGRA_APBDMA_CHAN_APBPTR, nsg_req->ch_regs.apb_ptr); in tegra_dma_configure_for_next()
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Dat_hdmac_regs.h69 #define ch_regs(x) (AT_DMA_CH_REGS_BASE + (x) * 0x28) /* Channel x base addr */ macro
255 void __iomem *ch_regs; member
275 __raw_readl((atchan)->ch_regs + ATC_##name##_OFFSET)
278 __raw_writel((val), (atchan)->ch_regs + ATC_##name##_OFFSET)
Dpch_dma.c128 struct pch_dma_desc_regs ch_regs[MAX_CHAN_NR]; member
761 pd->ch_regs[i].dev_addr = channel_readl(pd_chan, DEV_ADDR); in pch_dma_save_regs()
762 pd->ch_regs[i].mem_addr = channel_readl(pd_chan, MEM_ADDR); in pch_dma_save_regs()
763 pd->ch_regs[i].size = channel_readl(pd_chan, SIZE); in pch_dma_save_regs()
764 pd->ch_regs[i].next = channel_readl(pd_chan, NEXT); in pch_dma_save_regs()
784 channel_writel(pd_chan, DEV_ADDR, pd->ch_regs[i].dev_addr); in pch_dma_restore_regs()
785 channel_writel(pd_chan, MEM_ADDR, pd->ch_regs[i].mem_addr); in pch_dma_restore_regs()
786 channel_writel(pd_chan, SIZE, pd->ch_regs[i].size); in pch_dma_restore_regs()
787 channel_writel(pd_chan, NEXT, pd->ch_regs[i].next); in pch_dma_restore_regs()
Dtxx9dmac.h167 void __iomem *ch_regs; member
Dtxx9dmac.c29 return dc->ch_regs; in __dma_regs()
35 return dc->ch_regs; in __dma_regs32()
1137 dc->ch_regs = &__txx9dmac_regs(dc->ddev)->CHAN[ch]; in txx9dmac_chan_probe()
1139 dc->ch_regs = &__txx9dmac_regs32(dc->ddev)->CHAN[ch]; in txx9dmac_chan_probe()
Dat_xdmac.c196 void __iomem *ch_regs; member
266 #define at_xdmac_chan_read(atchan, reg) readl_relaxed((atchan)->ch_regs + (reg))
267 #define at_xdmac_chan_write(atchan, reg, value) writel_relaxed((value), (atchan)->ch_regs + (reg))
2029 atchan->ch_regs = at_xdmac_chan_reg_base(atxdmac, i); in at_xdmac_probe()
Dat_hdmac.c1901 atchan->ch_regs = atdma->regs + ch_regs(i); in at_dma_probe()
/Linux-v4.19/drivers/dma/dw/
Dregs.h255 void __iomem *ch_regs; member
286 return dwc->ch_regs; in __dwc_regs()
Dcore.c1302 dwc->ch_regs = &__dw_regs(dw)->CHAN[i]; in dw_dma_probe()