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Searched refs:cgs_read_register (Results 1 – 18 of 18) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Damdgpu_acp.c130 val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 + tile); in acp_suspend_tile()
134 val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG); in acp_suspend_tile()
142 val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 in acp_suspend_tile()
154 val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG); in acp_suspend_tile()
173 val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 + tile); in acp_resume_tile()
181 val = cgs_read_register(cgs_dev, mmACP_PGFSM_READ_REG_0 in acp_resume_tile()
192 val = cgs_read_register(cgs_dev, mmACP_PGFSM_RETAIN_REG); in acp_resume_tile()
444 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); in acp_hw_init()
451 val = cgs_read_register(adev->acp.cgs_device, mmACP_SOFT_RESET); in acp_hw_init()
462 val = cgs_read_register(adev->acp.cgs_device, mmACP_CONTROL); in acp_hw_init()
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/Linux-v4.19/drivers/gpu/drm/amd/powerplay/smumgr/
Diceland_smumgr.c1307 ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf)) in iceland_populate_single_memory_level()
1308 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; in iceland_populate_single_memory_level()
1310 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0; in iceland_populate_single_memory_level()
1316 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; in iceland_populate_single_memory_level()
1599 dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in iceland_populate_memory_timing_parameters()
1600 dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in iceland_populate_memory_timing_parameters()
2366 return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16)); in iceland_get_memory_modile_index()
2518 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS); in iceland_set_mc_special_registers()
2530 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS); in iceland_set_mc_special_registers()
2559 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS1); in iceland_set_mc_special_registers()
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Dci_smumgr.c150 original_data = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0); in ci_copy_bytes_to_smc()
203 *value = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_0); in ci_read_smc_sram_dword()
1258 ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf)) in ci_populate_single_memory_level()
1259 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; in ci_populate_single_memory_level()
1261 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0; in ci_populate_single_memory_level()
1267 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; in ci_populate_single_memory_level()
1635 dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in ci_populate_memory_timing_parameters()
1636 dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in ci_populate_memory_timing_parameters()
2436 return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16)); in ci_get_memory_modile_index()
2588 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_EMRS); in ci_set_mc_special_registers()
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Dtonga_smumgr.c1037 ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC7) >> 16) & 0xf)) { in tonga_populate_single_memory_level()
1038 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; in tonga_populate_single_memory_level()
1040 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC6) >> 1) & 0x1) ? 1 : 0; in tonga_populate_single_memory_level()
1049 dll_state_on = ((cgs_read_register(hwmgr->device, mmMC_SEQ_MISC5) >> 1) & 0x1) ? 1 : 0; in tonga_populate_single_memory_level()
1464 dramTiming = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in tonga_populate_memory_timing_parameters()
1465 dramTiming2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in tonga_populate_memory_timing_parameters()
2390 (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) & in tonga_init_smc_table()
2817 return (uint8_t) (0xFF & (cgs_read_register(hwmgr->device, mmBIOS_SCRATCH_4) >> 16)); in tonga_get_memory_modile_index()
2971 temp_reg = cgs_read_register(hwmgr->device, in tonga_set_mc_special_registers()
2984 temp_reg = cgs_read_register(hwmgr->device, mmMC_PMG_CMD_MRS); in tonga_set_mc_special_registers()
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Dsmu8_smumgr.c60 return cgs_read_register(hwmgr->device, in smu8_get_argument()
160 (cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA) & firmware)) in smu8_check_fw_load_finish()
192 tmp = cgs_read_register(hwmgr->device, in smu8_load_mec_firmware()
198 tmp = cgs_read_register(hwmgr->device, in smu8_load_mec_firmware()
712 hwmgr->smu_version = cgs_read_register(hwmgr->device, mmMP0PUB_IND_DATA); in smu8_start_smu()
Dfiji_smumgr.c1521 dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in fiji_populate_memory_timing_parameters()
1522 dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in fiji_populate_memory_timing_parameters()
1523 burstTime = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME); in fiji_populate_memory_timing_parameters()
2086 table->ThermOutPolarity = (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) & in fiji_init_smc_table()
2530 cgs_read_register(hwmgr->device, mmMC_SEQ_RAS_TIMING)); in fiji_initialize_mc_reg_table()
2532 cgs_read_register(hwmgr->device, mmMC_SEQ_CAS_TIMING)); in fiji_initialize_mc_reg_table()
2534 cgs_read_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2)); in fiji_initialize_mc_reg_table()
2536 cgs_read_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1)); in fiji_initialize_mc_reg_table()
2538 cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0)); in fiji_initialize_mc_reg_table()
2540 cgs_read_register(hwmgr->device, mmMC_SEQ_RD_CTL_D1)); in fiji_initialize_mc_reg_table()
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Dsmu7_smumgr.c125 original_data = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11); in smu7_copy_bytes_to_smc()
286 *value = result ? 0 : cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11); in smu7_read_smc_sram_dword()
Dvegam_smumgr.c1271 dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in vegam_populate_memory_timing_parameters()
1272 dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in vegam_populate_memory_timing_parameters()
1273 burst_time = cgs_read_register(hwmgr->device, mmMC_ARB_BURST_TIME); in vegam_populate_memory_timing_parameters()
1274 rfsh_rate = cgs_read_register(hwmgr->device, mmMC_ARB_RFSH_RATE); in vegam_populate_memory_timing_parameters()
1275 misc3 = cgs_read_register(hwmgr->device, mmMC_ARB_MISC3); in vegam_populate_memory_timing_parameters()
2092 (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) & in vegam_init_smc_table()
Dpolaris10_smumgr.c1348 dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in polaris10_populate_memory_timing_parameters()
1349 dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in polaris10_populate_memory_timing_parameters()
1904 table->ThermOutPolarity = (0 == (cgs_read_register(hwmgr->device, mmGPIOPAD_A) in polaris10_init_smc_table()
/Linux-v4.19/drivers/gpu/drm/amd/include/
Dcgs_common.h132 …cgs_write_register(device, mm##reg, (cgs_read_register(device, mm##reg) & ~CGS_REG_FIELD_MASK(reg,…
166 #define cgs_read_register(dev,offset) \ macro
/Linux-v4.19/drivers/gpu/drm/amd/acp/
Dacp_hw.c43 acp_mode = cgs_read_register(cgs_device, in amd_acp_hw_init()
/Linux-v4.19/drivers/gpu/drm/amd/powerplay/hwmgr/
Dsmu_helper.h127 PHM_GET_FIELD(cgs_read_register(device, mm##reg), reg, field)
139 cgs_read_register(device, mm##reg), reg, field, fieldval))
Dsmu7_hwmgr.c140 hwmgr->microcode_version_info.MC = cgs_read_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_DATA); in smu7_get_mc_microcode_version()
455 mc_arb_dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING); in smu7_copy_and_switch_arb_sets()
456 mc_arb_dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2); in smu7_copy_and_switch_arb_sets()
460 mc_arb_dram_timing = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING_1); in smu7_copy_and_switch_arb_sets()
461 mc_arb_dram_timing2 = cgs_read_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2_1); in smu7_copy_and_switch_arb_sets()
483 mc_cg_config = cgs_read_register(hwmgr->device, mmMC_CG_CONFIG); in smu7_copy_and_switch_arb_sets()
1161 (cgs_read_register(hwmgr->device, 0x1488) & ~0x1)); in smu7_start_dpm()
3482 tmp = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0); in smu7_get_gpu_power()
3520 sclk = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0); in smu7_read_sensor()
3526 mclk = cgs_read_register(hwmgr->device, mmSMC_MSG_ARG_0); in smu7_read_sensor()
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Dsmu_helper.c74 cur_value = cgs_read_register(hwmgr->device, index); in phm_wait_on_register()
118 cur_value = cgs_read_register(hwmgr->device, in phm_wait_for_register_unequal()
Dsmu7_powertune.c922 data = cgs_read_register(hwmgr->device, config_regs->offset); in smu7_program_pt_config_registers()
973 value2 = cgs_read_register(hwmgr->device, mmGRBM_GFX_INDEX); in smu7_enable_didt_config()
Dvega10_powertune.c839 data = cgs_read_register(hwmgr->device, config_regs->offset); in vega10_program_gc_didt_config_registers()
Dsmu8_hwmgr.c1754 activity_percent = cgs_read_register(hwmgr->device, mmSMU_MP1_SRBM2P_ARG_0); in smu8_read_sensor()
/Linux-v4.19/drivers/gpu/drm/amd/display/dc/
Ddm_services.h72 value = cgs_read_register(ctx->cgs_device, address); in dm_read_reg_func()