Searched refs:bws (Results 1 – 6 of 6) sorted by relevance
6 ATL can maintain a clock averages to some desired frequency based on the bws/aws42 - bws : Baseband word select signal selection91 bws = <DRA7_ATL_WS_MCASP2_FSX>;
55 u32 bws; /* Baseband Word Select Mux */ member280 &cdesc->bws); in of_dra7_atl_clk_probe()286 cdesc->bws); in of_dra7_atl_clk_probe()
227 bws = <DRA7_ATL_WS_MCASP2_FSX>;
543 bws = <DRA7_ATL_WS_MCASP2_FSX>;
903 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; in cdv_intel_dp_mode_fixup() local915 int link_avail = cdv_intel_dp_max_data_rate(cdv_intel_dp_link_clock(bws[clock]), lane_count); in cdv_intel_dp_mode_fixup()918 intel_dp->link_bw = bws[clock]; in cdv_intel_dp_mode_fixup()932 intel_dp->link_bw = bws[max_clock]; in cdv_intel_dp_mode_fixup()
159 // TX queues must be rated starting from 0, so set bws for tx0 and tx1375 // TX queues must be rated starting from 0, so set bws for tx0 and tx1 for Eth0
