| /Linux-v4.19/drivers/clk/ux500/ |
| D | u8500_of_clk.c | 66 u32 bases[CLKRST_MAX]; in u8500_clk_init() local
69 for (i = 0; i < ARRAY_SIZE(bases); i++) { in u8500_clk_init()
76 bases[i] = r.start; in u8500_clk_init()
254 clk = clk_reg_prcc_pclk("p1_pclk0", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
258 clk = clk_reg_prcc_pclk("p1_pclk1", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
262 clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
266 clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
270 clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
274 clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
278 clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", bases[CLKRST1_INDEX], in u8500_clk_init()
[all …]
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| /Linux-v4.19/drivers/gpu/drm/nouveau/dispnv50/ |
| D | base.c | 33 } bases[] = { in nv50_base_new() local
46 cid = nvif_mclass(&disp->disp->object, bases); in nv50_base_new()
52 return bases[cid].new(drm, head, bases[cid].oclass, pwndw); in nv50_base_new()
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| /Linux-v4.19/drivers/gpu/host1x/ |
| D | syncpt.c | 36 struct host1x_syncpt_base *bases = host->bases; in host1x_syncpt_base_request() local
40 if (!bases[i].requested) in host1x_syncpt_base_request()
46 bases[i].requested = true; in host1x_syncpt_base_request()
47 return &bases[i]; in host1x_syncpt_base_request()
378 struct host1x_syncpt_base *bases; in host1x_syncpt_init() local
387 bases = devm_kcalloc(host->dev, host->info->nb_bases, sizeof(*bases), in host1x_syncpt_init()
389 if (!bases) in host1x_syncpt_init()
405 bases[i].id = i; in host1x_syncpt_init()
409 host->bases = bases; in host1x_syncpt_init()
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| D | dev.h | 114 struct host1x_syncpt_base *bases; member
|
| /Linux-v4.19/drivers/iommu/ |
| D | rockchip-iommu.c | 99 void __iomem **bases; member
287 writel(command, iommu->bases[i] + RK_MMU_COMMAND); in rk_iommu_command()
307 rk_iommu_write(iommu->bases[i], RK_MMU_ZAP_ONE_LINE, iova); in rk_iommu_zap_lines()
317 active &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) & in rk_iommu_is_stall_active()
329 enable &= !!(rk_iommu_read(iommu->bases[i], RK_MMU_STATUS) & in rk_iommu_is_paging_enabled()
341 done &= rk_iommu_read(iommu->bases[i], RK_MMU_DTE_ADDR) == 0; in rk_iommu_is_reset_done()
366 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_enable_stall()
387 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_disable_stall()
408 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_enable_paging()
429 rk_iommu_read(iommu->bases[i], RK_MMU_STATUS)); in rk_iommu_disable_paging()
[all …]
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| /Linux-v4.19/arch/x86/boot/ |
| D | early_serial_console.c | 77 static const int bases[] = { 0x3f8, 0x2f8 }; in parse_earlyprintk() local
86 port = bases[idx]; in parse_earlyprintk()
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| /Linux-v4.19/drivers/gpu/drm/exynos/ |
| D | exynos_drm_scaler.c | 166 static unsigned int bases[] = { in scaler_set_src_base() local
174 scaler_write(src_buf->dma_addr[i], bases[i]); in scaler_set_src_base()
224 static unsigned int bases[] = { in scaler_set_dst_base() local
232 scaler_write(dst_buf->dma_addr[i], bases[i]); in scaler_set_dst_base()
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| /Linux-v4.19/arch/x86/kernel/ |
| D | early_printk.c | 165 static const int __initconst bases[] = { 0x3f8, 0x2f8 }; in early_serial_init() local
172 early_serial_base = bases[port]; in early_serial_init()
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| /Linux-v4.19/drivers/platform/mellanox/ |
| D | Kconfig | 33 are defined per system type bases and include the registers related
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| /Linux-v4.19/Documentation/devicetree/bindings/interrupt-controller/ |
| D | mediatek,sysirq.txt | 26 mapped region. Could be multiple bases here. Ex: mt6797 needs 2 reg, others
|
| /Linux-v4.19/drivers/net/wireless/broadcom/b43/ |
| D | pio.c | 95 static const u16 bases[] = { in index_to_pioqueue_base() local
118 B43_WARN_ON(index >= ARRAY_SIZE(bases)); in index_to_pioqueue_base()
119 return bases[index]; in index_to_pioqueue_base()
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| /Linux-v4.19/drivers/isdn/gigaset/ |
| D | Kconfig | 8 ISDN DECT bases, including the predecessors Gigaset 3070/3075
|
| /Linux-v4.19/drivers/gpu/drm/i915/ |
| D | intel_engine_cs.c | 243 const struct engine_mmio_base *bases) in __engine_mmio_base() argument
248 if (INTEL_GEN(i915) >= bases[i].gen) in __engine_mmio_base()
252 GEM_BUG_ON(!bases[i].base); in __engine_mmio_base()
254 return bases[i].base; in __engine_mmio_base()
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| /Linux-v4.19/drivers/gpu/drm/msm/ |
| D | NOTES | 58 register interface is same, just different bases.)
|
| /Linux-v4.19/sound/pci/hda/ |
| D | hda_proc.c | 263 static const char * const bases[7] = { in get_jack_location() local
280 return bases[cfg & 0x0f]; in get_jack_location()
|
| /Linux-v4.19/Documentation/isdn/ |
| D | README.gigaset | 9 ISDN DECT bases via Gigaset M101 Data, Gigaset M105 Data or direct USB
37 with SX 100 and CX 100 ISDN bases (only in unimodem mode, see section 2.5.)
254 bases only support one DECT data connection at a time, this prevents
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| /Linux-v4.19/Documentation/devicetree/bindings/spi/ |
| D | brcm,spi-bcm-qspi.txt | 33 Define the bases and ranges of the associated I/O address spaces.
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| /Linux-v4.19/Documentation/devicetree/bindings/arm/ |
| D | cci.txt | 49 addressing scheme to declare their register bases.
|
| /Linux-v4.19/Documentation/timers/ |
| D | highres.txt | 165 decision is made per timer base and synchronized across per-cpu timer bases in
167 clock event devices for the per-CPU timer bases, but currently only one
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| /Linux-v4.19/Documentation/ |
| D | intel_txt.txt | 68 static root of trust must be used. This bases trust in BIOS
|
| /Linux-v4.19/drivers/media/usb/gspca/ |
| D | Kconfig | 442 Say Y here if you want support for Xirlink C-It bases cameras.
|
| /Linux-v4.19/Documentation/filesystems/ |
| D | vfat.txt | 164 nostale_ro: This option bases the inode number and filehandle
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| /Linux-v4.19/Documentation/s390/ |
| D | cds.txt | 121 not share interrupt levels (aka. IRQs), as the ISA bus bases on edge triggered
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