Searched refs:bank_base (Results 1 – 3 of 3) sorted by relevance
67 void __iomem *bank_base[JZ_NAND_NUM_BANKS]; member95 chip->IO_ADDR_R = nand->bank_base[banknr]; in jz_nand_select_chip()96 chip->IO_ADDR_W = nand->bank_base[banknr]; in jz_nand_select_chip()108 void __iomem *bank_base = nand->bank_base[nand->selected_bank]; in jz_nand_cmd_ctrl() local115 bank_base += JZ_NAND_MEM_ADDR_OFFSET; in jz_nand_cmd_ctrl()117 bank_base += JZ_NAND_MEM_CMD_OFFSET; in jz_nand_cmd_ctrl()118 chip->IO_ADDR_W = bank_base; in jz_nand_cmd_ctrl()323 &nand->bank_base[bank - 1]); in jz_nand_detect_bank()367 nand->bank_base[bank - 1]); in jz_nand_detect_bank()495 nand->bank_base[bank - 1]); in jz_nand_probe()[all …]
169 static int ctrl_num, bank_base; in davinci_gpio_probe() local242 chips->chip.base = bank_base; in davinci_gpio_probe()255 bank_base += ngpio; in davinci_gpio_probe()274 bank_base -= ngpio; in davinci_gpio_probe()
926 void __iomem *bank_base; in alchemy_gpic_init_irq() local933 bank_base = AU1300_GPIC_ADDR + (i * 4); in alchemy_gpic_init_irq()934 __raw_writel(~0UL, bank_base + AU1300_GPIC_IDIS); in alchemy_gpic_init_irq()936 __raw_writel(~0UL, bank_base + AU1300_GPIC_IPEND); in alchemy_gpic_init_irq()
