Searched refs:ath79_pll_rr (Results 1 – 3 of 3) sorted by relevance
69 pll = ath79_pll_rr(AR71XX_PLL_REG_CPU_CONFIG); in ar71xx_clocks_init()273 pll = ath79_pll_rr(AR934X_PLL_CPU_CONFIG_REG); in ar934x_clocks_init()300 pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG); in ar934x_clocks_init()315 clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG); in ar934x_clocks_init()374 pll = ath79_pll_rr(QCA953X_PLL_CPU_CONFIG_REG); in qca953x_clocks_init()388 pll = ath79_pll_rr(QCA953X_PLL_DDR_CONFIG_REG); in qca953x_clocks_init()402 clk_ctrl = ath79_pll_rr(QCA953X_PLL_CLK_CTRL_REG); in qca953x_clocks_init()459 pll = ath79_pll_rr(QCA955X_PLL_CPU_CONFIG_REG); in qca955x_clocks_init()473 pll = ath79_pll_rr(QCA955X_PLL_DDR_CONFIG_REG); in qca955x_clocks_init()487 clk_ctrl = ath79_pll_rr(QCA955X_PLL_CLK_CTRL_REG); in qca955x_clocks_init()[all …]
162 static inline u32 ath79_pll_rr(unsigned reg) in ath79_pll_rr() function
342 ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); in ar724x_pci_hw_init()347 ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); in ar724x_pci_hw_init()
