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Searched refs:_bit (Results 1 – 25 of 40) sorted by relevance

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/Linux-v4.19/drivers/reset/sti/
Dreset-stih407.c22 #define STIH407_PDN_0(_bit) \ argument
23 _SYSCFG_RST_CH(stih407_core, SYSCFG_5000, _bit, SYSSTAT_5500, _bit)
24 #define STIH407_PDN_1(_bit) \ argument
25 _SYSCFG_RST_CH(stih407_core, SYSCFG_5001, _bit, SYSSTAT_5501, _bit)
26 #define STIH407_PDN_ETH(_bit, _stat) \ argument
27 _SYSCFG_RST_CH(stih407_sbc_reg, SYSCFG_4032, _bit, SYSSTAT_4520, _stat)
61 #define STIH407_SRST_CORE(_reg, _bit) \ argument
62 _SYSCFG_RST_CH_NO_ACK(stih407_core, _reg, _bit)
64 #define STIH407_SRST_SBC(_reg, _bit) \ argument
65 _SYSCFG_RST_CH_NO_ACK(stih407_sbc_reg, _reg, _bit)
[all …]
/Linux-v4.19/arch/arc/include/asm/
Dbitops.h32 static inline void op##_bit(unsigned long nr, volatile unsigned long *m)\
63 static inline int test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\
110 static inline void op##_bit(unsigned long nr, volatile unsigned long *m)\
127 static inline int test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\
145 static inline void op##_bit(unsigned long nr, volatile unsigned long *m)\
163 static inline int test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\
197 static inline void __##op##_bit(unsigned long nr, volatile unsigned long *m) \
207 static inline int __test_and_##op##_bit(unsigned long nr, volatile unsigned long *m)\
/Linux-v4.19/Documentation/
Datomic_bitops.txt20 {set,clear,change}_bit()
25 test_and_{set,clear,change}_bit()
47 The test_and_{}_bit() operations return the original value of the bit.
62 otherwise the above rules apply. In the case of test_and_{}_bit() operations,
/Linux-v4.19/drivers/pinctrl/mediatek/
Dpinctrl-mtk-common.h117 #define MTK_PIN_DRV_GRP(_pin, _offset, _bit, _grp) \ argument
121 .bit = _bit, \
165 #define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \ argument
169 .bit = _bit, \
Dpinctrl-mt2701.c39 #define MTK_PINMUX_SPEC(_pin, _offset, _bit) \ argument
43 .bit = _bit, \
/Linux-v4.19/drivers/clk/bcm/
Dclk-kona.h99 #define POLICY(_offset, _bit) \ argument
102 .bit = (_bit), \
383 #define TRIGGER(_offset, _bit) \ argument
386 .bit = (_bit), \
442 #define CCU_LVM_EN(_offset, _bit) \ argument
445 .bit = (_bit), \
/Linux-v4.19/drivers/clk/mvebu/
Darmada-37xx-periph.c118 #define PERIPH_GATE(_name, _bit) \ argument
121 .bit_idx = _bit, \
170 #define PERIPH_CLK_FULL_DD(_name, _bit, _shift, _reg1, _reg2, _shift1, _shift2)\ argument
171 static PERIPH_GATE(_name, _bit); \
175 #define PERIPH_CLK_FULL(_name, _bit, _shift, _reg, _shift1, _table) \ argument
176 static PERIPH_GATE(_name, _bit); \
180 #define PERIPH_CLK_GATE_DIV(_name, _bit, _reg, _shift, _table) \ argument
181 static PERIPH_GATE(_name, _bit); \
/Linux-v4.19/drivers/reset/
Dreset-uniphier.c37 #define UNIPHIER_RESET(_id, _reg, _bit) \ argument
41 .bit = (_bit), \
44 #define UNIPHIER_RESETX(_id, _reg, _bit) \ argument
48 .bit = (_bit), \
/Linux-v4.19/arch/sh/kernel/cpu/sh4a/
Dclock-sh7366.c120 #define DIV4(_reg, _bit, _mask, _flags) \ argument
121 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
140 #define MSTP(_parent, _reg, _bit, _flags) \ argument
141 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
Dclock-sh7343.c117 #define DIV4(_reg, _bit, _mask, _flags) \ argument
118 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
137 #define MSTP(_parent, _reg, _bit, _flags) \ argument
138 SH_CLK_MSTP32(_parent, _reg, _bit, _flags)
Dclock-shx3.c64 #define DIV4(_bit, _mask, _flags) \ argument
65 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
Dclock-sh7757.c65 #define DIV4(_bit, _mask, _flags) \ argument
66 SH_CLK_DIV4(&pll_clk, FRQCR, _bit, _mask, _flags)
Dclock-sh7785.c69 #define DIV4(_bit, _mask, _flags) \ argument
70 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
Dclock-sh7786.c70 #define DIV4(_bit, _mask, _flags) \ argument
71 SH_CLK_DIV4(&pll_clk, FRQMR1, _bit, _mask, _flags)
Dclock-sh7722.c120 #define DIV4(_reg, _bit, _mask, _flags) \ argument
121 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
/Linux-v4.19/drivers/clk/meson/
Dgxbb-aoclk.c12 #define GXBB_AO_GATE(_name, _bit) \ argument
16 .bit_idx = (_bit), \
Dclkc.h101 #define MESON_GATE(_name, _reg, _bit) \ argument
105 .bit_idx = (_bit), \
Daxg-aoclk.c19 #define AXG_AO_GATE(_name, _bit) \ argument
23 .bit_idx = (_bit), \
/Linux-v4.19/drivers/clk/uniphier/
Dclk-uniphier.h104 #define UNIPHIER_CLK_GATE(_name, _idx, _parent, _reg, _bit) \ argument
112 .bit = (_bit), \
/Linux-v4.19/arch/sh/kernel/cpu/sh2a/
Dclock-sh7264.c80 #define DIV4(_reg, _bit, _mask, _flags) \ argument
81 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
Dclock-sh7269.c108 #define DIV4(_reg, _bit, _mask, _flags) \ argument
109 SH_CLK_DIV4(&pll_clk, _reg, _bit, _mask, _flags)
/Linux-v4.19/drivers/clk/zte/
Dclk.h63 #define GATE(_id, _name, _parent, _reg, _bit, _flag, _gflags) \ argument
67 .bit_idx = (_bit), \
/Linux-v4.19/drivers/memory/tegra/
Dtegra20.c173 #define TEGRA20_MC_RESET(_name, _control, _status, _reset, _bit) \ argument
180 .bit = _bit, \
/Linux-v4.19/drivers/staging/rtl8723bs/hal/
Dodm_interface.h40 #define ODM_BIT(_name, _pDM_Odm) _cat(_name, _pDM_Odm->SupportICType, _bit)
/Linux-v4.19/drivers/clk/
Dclk-oxnas.c100 #define OXNAS_GATE(_name, _bit, _parents) \ argument
102 .bit = (_bit), \

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