Searched refs:__MASK (Results 1 – 5 of 5) sorted by relevance
65 #define __MASK(X) (1<<(X)) macro67 #define __MASK(X) (1UL<<(X)) macro71 #define MSR_SF __MASK(MSR_SF_LG) /* Enable 64 bit mode */72 #define MSR_ISF __MASK(MSR_ISF_LG) /* Interrupt 64b mode valid on 630 */73 #define MSR_HV __MASK(MSR_HV_LG) /* Hypervisor state */89 #define MSR_VEC __MASK(MSR_VEC_LG) /* Enable AltiVec */90 #define MSR_VSX __MASK(MSR_VSX_LG) /* Enable VSX */91 #define MSR_POW __MASK(MSR_POW_LG) /* Enable Power Management */92 #define MSR_WE __MASK(MSR_WE_LG) /* Wait State Enable */93 #define MSR_TGPR __MASK(MSR_TGPR_LG) /* TLB Update registers in use */[all …]
31 #define MSR_GS __MASK(MSR_GS_LG)32 #define MSR_UCLE __MASK(MSR_UCLE_LG)33 #define MSR_SPE __MASK(MSR_SPE_LG)34 #define MSR_DWE __MASK(MSR_DWE_LG)35 #define MSR_UBLE __MASK(MSR_UBLE_LG)36 #define MSR_IS __MASK(MSR_IS_LG)37 #define MSR_DS __MASK(MSR_DS_LG)38 #define MSR_PMM __MASK(MSR_PMM_LG)39 #define MSR_CM __MASK(MSR_CM_LG)
13 #define EXTRACT(val, field) (((val) & field##__MASK) >> field##__SHIFT)
157 (((val) & field##__MASK) >> field##__SHIFT)
427 #define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
