Searched refs:ZS_CLOCK (Results 1 – 5 of 5) sorted by relevance
68 #define ZS_CLOCK 4915200 /* Zilog input clock rate. */ macro292 brg = BPS_TO_BRG(new_baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); in sunzilog_change_mouse_baud()956 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); in sunzilog_set_termios()1251 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); in sunzilog_console_setup()1298 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); in sunzilog_init_kbdms()1377 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); in sunzilog_init_hw()1439 up[0].port.uartclk = ZS_CLOCK; in zs_probe()1456 up[1].port.uartclk = ZS_CLOCK; in zs_probe()
60 #define ZS_CLOCK 3672000 /* Zilog input clock rate. */ macro891 brg = BPS_TO_BRG(baud, ZS_CLOCK / ZS_CLOCK_DIVISOR); in ip22zilog_set_termios()1116 up[(chip * 2) + 0].port.uartclk = ZS_CLOCK; in ip22zilog_prepare()1127 up[(chip * 2) + 1].port.uartclk = ZS_CLOCK; in ip22zilog_prepare()1148 brg = BPS_TO_BRG(9600, ZS_CLOCK / ZS_CLOCK_DIVISOR); in ip22zilog_prepare()
120 #define ZS_CLOCK 3686400 /* Z8530 RTxC input clock rate */ macro
1020 case ZS_CLOCK/16: /* 230400 */ in pmz_convert_to_zs()1025 case ZS_CLOCK/32: /* 115200 */ in pmz_convert_to_zs()1033 brg = BPS_TO_BRG(baud, ZS_CLOCK / 16); in pmz_convert_to_zs()1497 uap->port.uartclk = ZS_CLOCK; in pmz_init_port()1717 uap->port.uartclk = ZS_CLOCK; in pmz_init_port()
101 #define ZS_CLOCK 7372800 /* Z85C30 PCLK input clock rate. */ macro1110 uport->uartclk = ZS_CLOCK; in zs_probe_sccs()
