Searched refs:XGMAC_DMA_CONTROL (Results 1 – 2 of 2) sorted by relevance
37 #define XGMAC_DMA_CONTROL 0x00000f18 /* Ctrl (Operational Mode) */ macro50 u32 value = readl(ioaddr + XGMAC_DMA_CONTROL); in xgmac_mac_disable()53 writel(value, ioaddr + XGMAC_DMA_CONTROL); in xgmac_mac_disable()
100 #define XGMAC_DMA_CONTROL 0x00000f18 /* Ctrl (Operational Mode) */ macro605 value = readl(ioaddr + XGMAC_DMA_CONTROL); in xgmac_mac_enable()607 writel(value, ioaddr + XGMAC_DMA_CONTROL); in xgmac_mac_enable()612 u32 value = readl(ioaddr + XGMAC_DMA_CONTROL); in xgmac_mac_disable()614 writel(value, ioaddr + XGMAC_DMA_CONTROL); in xgmac_mac_disable()927 reg = readl(priv->base + XGMAC_DMA_CONTROL); in xgmac_tx_timeout_work()928 writel(reg & ~DMA_CONTROL_ST, priv->base + XGMAC_DMA_CONTROL); in xgmac_tx_timeout_work()938 writel(reg | DMA_CONTROL_ST, priv->base + XGMAC_DMA_CONTROL); in xgmac_tx_timeout_work()992 writel(DMA_CONTROL_OSF, ioaddr + XGMAC_DMA_CONTROL); in xgmac_hw_init()1882 value = readl(priv->base + XGMAC_DMA_CONTROL); in xgmac_suspend()[all …]
