Searched refs:XGMAC_DMA_CH_CONTROL (Results 1 – 2 of 2) sorted by relevance
36 u32 value = readl(ioaddr + XGMAC_DMA_CH_CONTROL(chan)); in dwxgmac2_dma_init_chan()41 writel(value, ioaddr + XGMAC_DMA_CH_CONTROL(chan)); in dwxgmac2_dma_init_chan()
161 #define XGMAC_DMA_CH_CONTROL(x) (0x00003100 + (0x80 * (x))) macro
