Searched refs:X16CLK (Results 1 – 10 of 10) sorted by relevance
83 #define X16CLK 0x40 /* x16 clock mode */ macro
136 #define X16CLK 0x40 /* x16 clock mode */ macro
117 #define X16CLK 0x40 /* x16 clock mode */ macro
109 #define X16CLK 0x40 /* x16 clock mode */ macro
207 #define X16CLK 0x40 /* x16 clock mode */ macro
818 write_zsreg(uap, 4, X16CLK | SB_MASK); in pmz_fix_zero_bug_scc()862 uap->curregs[R4] = X16CLK | SB1; in __pmz_startup()1021 uap->curregs[R4] = X16CLK; in pmz_convert_to_zs()1031 uap->curregs[R4] = X16CLK; in pmz_convert_to_zs()
878 up->curregs[R4] |= X16CLK; in sunzilog_convert_to_zs()1352 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in sunzilog_init_hw()1368 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in sunzilog_init_hw()
813 up->curregs[R4] |= X16CLK; in ip22zilog_convert_to_zs()1142 up->curregs[R4] = PAR_EVEN | X16CLK | SB1; in ip22zilog_prepare()
117 X16CLK | SB1, /* write 4 */906 zport->regs[4] |= X16CLK; in zs_set_termios()
104 #define X16CLK 0x40 /* x16 clock mode */ macro
