Searched refs:WT_FN_RDYFN (Results 1 – 8 of 8) sorted by relevance
766 write_scc(priv, R1, EXT_INT_ENAB | WT_FN_RDYFN); in scc_open()1004 EXT_INT_ENAB | WT_FN_RDYFN | in tx_on()1016 EXT_INT_ENAB | WT_FN_RDYFN | TxINT_ENAB); in tx_on()1050 WT_RDY_RT | WT_FN_RDYFN | WT_RDY_ENAB); in rx_on()1056 WT_FN_RDYFN); in rx_on()1071 write_scc(priv, R1, EXT_INT_ENAB | WT_FN_RDYFN); in rx_off()1351 write_scc(priv, R1, EXT_INT_ENAB | WT_FN_RDYFN); in es_isr()
49 #define WT_FN_RDYFN 0x40 /* Wait/FN/Ready FN */ macro
102 #define WT_FN_RDYFN 0x40 /* Wait/FN/Ready FN */ macro
82 #define WT_FN_RDYFN 0x40 /* Wait/FN/Ready FN */ macro
74 #define WT_FN_RDYFN 0x40 /* Wait/FN/Ready FN */ macro
171 #define WT_FN_RDYFN 0x40 /* W/Req pin is DMA request if 1, wait if 0 */ macro
70 #define WT_FN_RDYFN 0x40 /* Wait/FN/Ready FN */ macro
919 c->regs[R1]|= WT_FN_RDYFN; in z8530_sync_dma_open()1013 c->regs[R1]&= ~(WT_RDY_RT|WT_FN_RDYFN|INT_ERR_Rx); in z8530_sync_dma_close()1182 c->regs[R1]&= ~(WT_RDY_RT|WT_FN_RDYFN|INT_ERR_Rx); in z8530_sync_txdma_close()
