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Searched refs:VM_L2_CNTL__ENABLE_L2_CACHE_MASK (Results 1 – 12 of 12) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Dgmc_v6_0.c516 VM_L2_CNTL__ENABLE_L2_CACHE_MASK | in gmc_v6_0_gart_enable()
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gmc/
Dgmc_7_0_sh_mask.h5267 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK 0x1 macro
Dgmc_8_2_sh_mask.h6389 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK 0x1 macro
Dgmc_6_0_sh_mask.h11840 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK 0x00000001L macro
Dgmc_7_1_sh_mask.h5909 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK 0x1 macro
Dgmc_8_1_sh_mask.h6511 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK 0x1 macro
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/mmhub/
Dmmhub_1_0_sh_mask.h7754 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro
Dmmhub_9_1_sh_mask.h7417 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro
Dmmhub_9_3_0_sh_mask.h7844 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro
/Linux-v4.19/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h6582 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro
Dgc_9_1_sh_mask.h6496 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro
Dgc_9_2_1_sh_mask.h6319 #define VM_L2_CNTL__ENABLE_L2_CACHE_MASK macro