Searched refs:VM_L2_CNTL2 (Results 1 – 17 of 17) sorted by relevance
| /Linux-v4.19/drivers/gpu/drm/amd/amdgpu/ |
| D | gfxhub_v1_0.c | 141 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gfxhub_v1_0_init_cache_regs()
142 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in gfxhub_v1_0_init_cache_regs()
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| D | mmhub_v1_0.c | 154 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in mmhub_v1_0_init_cache_regs()
155 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in mmhub_v1_0_init_cache_regs()
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| D | gmc_v7_0.c | 632 tmp = REG_SET_FIELD(0, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gmc_v7_0_gart_enable()
633 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in gmc_v7_0_gart_enable()
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| D | gmc_v8_0.c | 838 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS, 1); in gmc_v8_0_gart_enable()
839 tmp = REG_SET_FIELD(tmp, VM_L2_CNTL2, INVALIDATE_L2_CACHE, 1); in gmc_v8_0_gart_enable()
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| D | sid.h | 380 #define VM_L2_CNTL2 0x501 macro
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| /Linux-v4.19/drivers/gpu/drm/radeon/ |
| D | rv770.c | 909 WREG32(VM_L2_CNTL2, 0); in rv770_pcie_gart_enable()
955 WREG32(VM_L2_CNTL2, 0); in rv770_pcie_gart_disable()
986 WREG32(VM_L2_CNTL2, 0); in rv770_agp_enable()
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| D | rv770d.h | 647 #define VM_L2_CNTL2 0x1404 macro
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| D | nid.h | 117 #define VM_L2_CNTL2 0x1404 macro
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| D | ni.c | 1297 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in cayman_pcie_gart_enable()
1376 WREG32(VM_L2_CNTL2, 0); in cayman_pcie_gart_disable()
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| D | sid.h | 378 #define VM_L2_CNTL2 0x1404 macro
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| D | cikd.h | 496 #define VM_L2_CNTL2 0x1404 macro
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| D | evergreen.c | 2409 WREG32(VM_L2_CNTL2, 0); in evergreen_pcie_gart_enable()
2462 WREG32(VM_L2_CNTL2, 0); in evergreen_pcie_gart_disable()
2492 WREG32(VM_L2_CNTL2, 0); in evergreen_agp_enable()
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| D | evergreend.h | 1155 #define VM_L2_CNTL2 0x1404 macro
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| D | r600d.h | 592 #define VM_L2_CNTL2 0x1404 macro
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| D | r600.c | 1140 WREG32(VM_L2_CNTL2, 0); in r600_pcie_gart_enable()
1232 WREG32(VM_L2_CNTL2, 0); in r600_agp_enable()
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| D | si.c | 4307 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in si_pcie_gart_enable()
4393 WREG32(VM_L2_CNTL2, 0); in si_pcie_gart_disable()
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| D | cik.c | 5455 WREG32(VM_L2_CNTL2, INVALIDATE_ALL_L1_TLBS | INVALIDATE_L2_CACHE); in cik_pcie_gart_enable()
5572 WREG32(VM_L2_CNTL2, 0); in cik_pcie_gart_disable()
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