Searched refs:VLV_PCS_DW1 (Results 1 – 2 of 2) sorted by relevance
1024 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW1(port), in vlv_phy_pre_pll_enable()1078 vlv_dpio_write(dev_priv, pipe, VLV_PCS_DW1(port), 0x00e00060); in vlv_phy_reset_lanes()
1342 #define VLV_PCS_DW1(ch) _PORT(ch, _VLV_PCS_DW1_CH0, _VLV_PCS_DW1_CH1) macro
