Searched refs:VISLANDS30_IV_SRCID_CP_PRIV_REG_FAULT (Results 1 – 2 of 2) sorted by relevance
238 #define VISLANDS30_IV_SRCID_CP_PRIV_REG_FAULT 0x000000b8 /* 184 */ macro
2062 r = amdgpu_irq_add_id(adev, AMDGPU_IH_CLIENTID_LEGACY, VISLANDS30_IV_SRCID_CP_PRIV_REG_FAULT, in gfx_v8_0_sw_init()
