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Searched refs:VIACR (Results 1 – 9 of 9) sorted by relevance

/Linux-v4.19/drivers/video/fbdev/via/
Dviamode.c33 {VIACR, CR32, 0xFF, 0x00},
34 {VIACR, CR33, 0xFF, 0x00},
35 {VIACR, CR35, 0xFF, 0x00},
36 {VIACR, CR36, 0x08, 0x00},
37 {VIACR, CR69, 0xFF, 0x00},
38 {VIACR, CR6A, 0xFF, 0x40},
39 {VIACR, CR6B, 0xFF, 0x00},
40 {VIACR, CR88, 0xFF, 0x40}, /* LCD Panel Type */
41 {VIACR, CR89, 0xFF, 0x00}, /* LCD Timing Control 0 */
42 {VIACR, CR8A, 0xFF, 0x88}, /* LCD Timing Control 1 */
[all …]
Dvia_modesetting.c51 via_write_reg_mask(VIACR, 0x11, 0x00, 0x80); in via_set_primary_timing()
53 via_write_reg(VIACR, 0x00, raw.hor_total & 0xFF); in via_set_primary_timing()
54 via_write_reg(VIACR, 0x01, raw.hor_addr & 0xFF); in via_set_primary_timing()
55 via_write_reg(VIACR, 0x02, raw.hor_blank_start & 0xFF); in via_set_primary_timing()
56 via_write_reg_mask(VIACR, 0x03, raw.hor_blank_end & 0x1F, 0x1F); in via_set_primary_timing()
57 via_write_reg(VIACR, 0x04, raw.hor_sync_start & 0xFF); in via_set_primary_timing()
58 via_write_reg_mask(VIACR, 0x05, (raw.hor_sync_end & 0x1F) in via_set_primary_timing()
60 via_write_reg(VIACR, 0x06, raw.ver_total & 0xFF); in via_set_primary_timing()
61 via_write_reg_mask(VIACR, 0x07, (raw.ver_total >> 8 & 0x01) in via_set_primary_timing()
68 via_write_reg_mask(VIACR, 0x09, raw.ver_blank_start >> (9 - 5) & 0x20, in via_set_primary_timing()
[all …]
Ddvi.c207 RegCR6B = viafb_read_reg(VIACR, CR6B); in viafb_dvi_sense()
208 viafb_write_reg(CR6B, VIACR, RegCR6B | 0x08); in viafb_dvi_sense()
212 RegCR91 = viafb_read_reg(VIACR, CR91); in viafb_dvi_sense()
213 viafb_write_reg(CR91, VIACR, 0x1D); in viafb_dvi_sense()
219 RegCR93 = viafb_read_reg(VIACR, CR93); in viafb_dvi_sense()
220 viafb_write_reg(CR93, VIACR, 0x01); in viafb_dvi_sense()
233 RegCR91 = viafb_read_reg(VIACR, CR91); in viafb_dvi_sense()
234 viafb_write_reg(CR91, VIACR, 0x1D); in viafb_dvi_sense()
238 RegCR9B = viafb_read_reg(VIACR, CR9B); in viafb_dvi_sense()
239 viafb_write_reg(CR9B, VIACR, 0x01); in viafb_dvi_sense()
[all …]
Dlcd.c189 viafb_read_reg(VIACR, CR3F) & 0x0F; in fp_id_to_vindex()
359 viafb_write_reg_mask(CR79, VIACR, 0x07, BIT0 + BIT1 + BIT2); in load_lcd_scaling()
374 viafb_load_reg_num, reg, VIACR); in load_lcd_scaling()
390 viafb_write_reg_mask(CRA2, VIACR, 0xC0, BIT7 + BIT6); in load_lcd_scaling()
395 viafb_load_reg_num, reg, VIACR); in load_lcd_scaling()
402 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT7); in load_lcd_scaling()
418 viafb_load_reg_num, reg, VIACR); in load_lcd_scaling()
434 viafb_write_reg_mask(CRA2, VIACR, 0x08, BIT3); in load_lcd_scaling()
439 viafb_load_reg_num, reg, VIACR); in load_lcd_scaling()
446 viafb_write_reg_mask(CRA2, VIACR, 0x00, BIT3); in load_lcd_scaling()
[all …]
Dhw.c104 {VIACR, CR7A, 0xFF, 0x01}, /* LCD Scaling Parameter 1 */
105 {VIACR, CR7B, 0xFF, 0x02}, /* LCD Scaling Parameter 2 */
106 {VIACR, CR7C, 0xFF, 0x03}, /* LCD Scaling Parameter 3 */
107 {VIACR, CR7D, 0xFF, 0x04}, /* LCD Scaling Parameter 4 */
108 {VIACR, CR7E, 0xFF, 0x07}, /* LCD Scaling Parameter 5 */
109 {VIACR, CR7F, 0xFF, 0x0A}, /* LCD Scaling Parameter 6 */
110 {VIACR, CR80, 0xFF, 0x0D}, /* LCD Scaling Parameter 7 */
111 {VIACR, CR81, 0xFF, 0x13}, /* LCD Scaling Parameter 8 */
112 {VIACR, CR82, 0xFF, 0x16}, /* LCD Scaling Parameter 9 */
113 {VIACR, CR83, 0xFF, 0x19}, /* LCD Scaling Parameter 10 */
[all …]
Dvia_utility.c162 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); in viafb_set_gamma_table()
184 viafb_write_reg_mask(CR6A, VIACR, 0x02, BIT1); in viafb_set_gamma_table()
217 viafb_write_reg_mask(CR33, VIACR, 0x80, BIT7); in viafb_get_gamma_table()
Dvia_clock.c264 via_write_reg_mask(VIACR, 0x6C, data, 0xF0); in set_primary_clock_source()
270 via_write_reg_mask(VIACR, 0x6C, data, 0x0F); in set_secondary_clock_source()
Dviafbdev.c1133 dvp0 = viafb_read_reg(VIACR, CR96) & 0x0f; in viafb_dvp0_proc_show()
1165 viafb_write_reg_mask(CR96, VIACR, in viafb_dvp0_proc_write()
1202 dvp1 = viafb_read_reg(VIACR, CR9B) & 0x0f; in viafb_dvp1_proc_show()
1234 viafb_write_reg_mask(CR9B, VIACR, in viafb_dvp1_proc_write()
1267 dfp_high = viafb_read_reg(VIACR, CR97) & 0x0f; in viafb_dfph_proc_show()
1286 viafb_write_reg_mask(CR97, VIACR, reg_val, 0x0f); in viafb_dfph_proc_write()
1302 dfp_low = viafb_read_reg(VIACR, CR99) & 0x0f; in viafb_dfpl_proc_show()
1321 viafb_write_reg_mask(CR99, VIACR, reg_val, 0x0f); in viafb_dfpl_proc_write()
/Linux-v4.19/include/linux/
Dvia-core.h200 #define VIACR 0x3D4 macro