Searched refs:VF610_CLK_ESDHC0 (Results 1 – 3 of 3) sorted by relevance
93 #define VF610_CLK_ESDHC0 80 macro
340 clk[VF610_CLK_ESDHC0] = imx_clk_gate2("eshc0", "esdhc0_div", CCM_CCGR7, CCM_CCGRx_CGn(1)); in vf610_clocks_init()
620 <&clks VF610_CLK_ESDHC0>;
