Searched refs:VCLK_POST_DIV (Results 1 – 4 of 4) sorted by relevance
318 tmp = aty_ld_pll_ct(VCLK_POST_DIV, par); in aty_set_pll_ct()321 aty_st_pll_ct(VCLK_POST_DIV, tmp, par); in aty_set_pll_ct()384 pll->ct.vclk_post_div = (aty_ld_pll_ct(VCLK_POST_DIV, par) >> tmp) & 0x03U; in aty_get_pll_ct()
3100 P = aty_postdividers[((pll_regs[VCLK_POST_DIV] >> ((clock_cntl & 3) << 1)) & 3) | in atyfb_setup_sparc()
801 #define VCLK_POST_DIV 0x06 macro
173 #define VCLK_POST_DIV 0x6010 macro
