Searched refs:V7M_SCB_CTR (Results 1 – 4 of 4) sorted by relevance
77 movw \tmp, #:lower16:BASEADDR_V7M_SCB + V7M_SCB_CTR78 movt \tmp, #:upper16:BASEADDR_V7M_SCB + V7M_SCB_CTR95 movw \tmp, #:lower16:BASEADDR_V7M_SCB + V7M_SCB_CTR96 movt \tmp, #:upper16:BASEADDR_V7M_SCB + V7M_SCB_CTR
57 #define V7M_SCB_CTR 0x7c /* Cache Type register */ macro
90 writel(cache_selector, BASEADDR_V7M_SCB + V7M_SCB_CTR); in set_csselr()
203 return readl(BASEADDR_V7M_SCB + V7M_SCB_CTR); in read_cpuid_cachetype()
