1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Driver for the Atmel USBA high speed USB device controller
4 *
5 * Copyright (C) 2005-2007 Atmel Corporation
6 */
7 #ifndef __LINUX_USB_GADGET_USBA_UDC_H__
8 #define __LINUX_USB_GADGET_USBA_UDC_H__
9
10 #include <linux/gpio/consumer.h>
11
12 /* USB register offsets */
13 #define USBA_CTRL 0x0000
14 #define USBA_FNUM 0x0004
15 #define USBA_INT_ENB 0x0010
16 #define USBA_INT_STA 0x0014
17 #define USBA_INT_CLR 0x0018
18 #define USBA_EPT_RST 0x001c
19 #define USBA_TST 0x00e0
20
21 /* USB endpoint register offsets */
22 #define USBA_EPT_CFG 0x0000
23 #define USBA_EPT_CTL_ENB 0x0004
24 #define USBA_EPT_CTL_DIS 0x0008
25 #define USBA_EPT_CTL 0x000c
26 #define USBA_EPT_SET_STA 0x0014
27 #define USBA_EPT_CLR_STA 0x0018
28 #define USBA_EPT_STA 0x001c
29
30 /* USB DMA register offsets */
31 #define USBA_DMA_NXT_DSC 0x0000
32 #define USBA_DMA_ADDRESS 0x0004
33 #define USBA_DMA_CONTROL 0x0008
34 #define USBA_DMA_STATUS 0x000c
35
36 /* Bitfields in CTRL */
37 #define USBA_DEV_ADDR_OFFSET 0
38 #define USBA_DEV_ADDR_SIZE 7
39 #define USBA_FADDR_EN (1 << 7)
40 #define USBA_EN_USBA (1 << 8)
41 #define USBA_DETACH (1 << 9)
42 #define USBA_REMOTE_WAKE_UP (1 << 10)
43 #define USBA_PULLD_DIS (1 << 11)
44
45 #define USBA_ENABLE_MASK (USBA_EN_USBA | USBA_PULLD_DIS)
46 #define USBA_DISABLE_MASK USBA_DETACH
47
48 /* Bitfields in FNUM */
49 #define USBA_MICRO_FRAME_NUM_OFFSET 0
50 #define USBA_MICRO_FRAME_NUM_SIZE 3
51 #define USBA_FRAME_NUMBER_OFFSET 3
52 #define USBA_FRAME_NUMBER_SIZE 11
53 #define USBA_FRAME_NUM_ERROR (1 << 31)
54
55 /* Bitfields in INT_ENB/INT_STA/INT_CLR */
56 #define USBA_HIGH_SPEED (1 << 0)
57 #define USBA_DET_SUSPEND (1 << 1)
58 #define USBA_MICRO_SOF (1 << 2)
59 #define USBA_SOF (1 << 3)
60 #define USBA_END_OF_RESET (1 << 4)
61 #define USBA_WAKE_UP (1 << 5)
62 #define USBA_END_OF_RESUME (1 << 6)
63 #define USBA_UPSTREAM_RESUME (1 << 7)
64 #define USBA_EPT_INT_OFFSET 8
65 #define USBA_EPT_INT_SIZE 16
66 #define USBA_DMA_INT_OFFSET 24
67 #define USBA_DMA_INT_SIZE 8
68
69 /* Bitfields in EPT_RST */
70 #define USBA_RST_OFFSET 0
71 #define USBA_RST_SIZE 16
72
73 /* Bitfields in USBA_TST */
74 #define USBA_SPEED_CFG_OFFSET 0
75 #define USBA_SPEED_CFG_SIZE 2
76 #define USBA_TST_J_MODE (1 << 2)
77 #define USBA_TST_K_MODE (1 << 3)
78 #define USBA_TST_PKT_MODE (1 << 4)
79 #define USBA_OPMODE2 (1 << 5)
80
81 /* Bitfields in EPT_CFG */
82 #define USBA_EPT_SIZE_OFFSET 0
83 #define USBA_EPT_SIZE_SIZE 3
84 #define USBA_EPT_DIR_IN (1 << 3)
85 #define USBA_EPT_TYPE_OFFSET 4
86 #define USBA_EPT_TYPE_SIZE 2
87 #define USBA_BK_NUMBER_OFFSET 6
88 #define USBA_BK_NUMBER_SIZE 2
89 #define USBA_NB_TRANS_OFFSET 8
90 #define USBA_NB_TRANS_SIZE 2
91 #define USBA_EPT_MAPPED (1 << 31)
92
93 /* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */
94 #define USBA_EPT_ENABLE (1 << 0)
95 #define USBA_AUTO_VALID (1 << 1)
96 #define USBA_INTDIS_DMA (1 << 3)
97 #define USBA_NYET_DIS (1 << 4)
98 #define USBA_DATAX_RX (1 << 6)
99 #define USBA_MDATA_RX (1 << 7)
100 /* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */
101 #define USBA_BUSY_BANK_IE (1 << 18)
102
103 /* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */
104 #define USBA_FORCE_STALL (1 << 5)
105 #define USBA_TOGGLE_CLR (1 << 6)
106 #define USBA_TOGGLE_SEQ_OFFSET 6
107 #define USBA_TOGGLE_SEQ_SIZE 2
108 #define USBA_ERR_OVFLW (1 << 8)
109 #define USBA_RX_BK_RDY (1 << 9)
110 #define USBA_KILL_BANK (1 << 9)
111 #define USBA_TX_COMPLETE (1 << 10)
112 #define USBA_TX_PK_RDY (1 << 11)
113 #define USBA_ISO_ERR_TRANS (1 << 11)
114 #define USBA_RX_SETUP (1 << 12)
115 #define USBA_ISO_ERR_FLOW (1 << 12)
116 #define USBA_STALL_SENT (1 << 13)
117 #define USBA_ISO_ERR_CRC (1 << 13)
118 #define USBA_ISO_ERR_NBTRANS (1 << 13)
119 #define USBA_NAK_IN (1 << 14)
120 #define USBA_ISO_ERR_FLUSH (1 << 14)
121 #define USBA_NAK_OUT (1 << 15)
122 #define USBA_CURRENT_BANK_OFFSET 16
123 #define USBA_CURRENT_BANK_SIZE 2
124 #define USBA_BUSY_BANKS_OFFSET 18
125 #define USBA_BUSY_BANKS_SIZE 2
126 #define USBA_BYTE_COUNT_OFFSET 20
127 #define USBA_BYTE_COUNT_SIZE 11
128 #define USBA_SHORT_PACKET (1 << 31)
129
130 /* Bitfields in DMA_CONTROL */
131 #define USBA_DMA_CH_EN (1 << 0)
132 #define USBA_DMA_LINK (1 << 1)
133 #define USBA_DMA_END_TR_EN (1 << 2)
134 #define USBA_DMA_END_BUF_EN (1 << 3)
135 #define USBA_DMA_END_TR_IE (1 << 4)
136 #define USBA_DMA_END_BUF_IE (1 << 5)
137 #define USBA_DMA_DESC_LOAD_IE (1 << 6)
138 #define USBA_DMA_BURST_LOCK (1 << 7)
139 #define USBA_DMA_BUF_LEN_OFFSET 16
140 #define USBA_DMA_BUF_LEN_SIZE 16
141
142 /* Bitfields in DMA_STATUS */
143 #define USBA_DMA_CH_ACTIVE (1 << 1)
144 #define USBA_DMA_END_TR_ST (1 << 4)
145 #define USBA_DMA_END_BUF_ST (1 << 5)
146 #define USBA_DMA_DESC_LOAD_ST (1 << 6)
147
148 /* Constants for SPEED_CFG */
149 #define USBA_SPEED_CFG_NORMAL 0
150 #define USBA_SPEED_CFG_FORCE_HIGH 2
151 #define USBA_SPEED_CFG_FORCE_FULL 3
152
153 /* Constants for EPT_SIZE */
154 #define USBA_EPT_SIZE_8 0
155 #define USBA_EPT_SIZE_16 1
156 #define USBA_EPT_SIZE_32 2
157 #define USBA_EPT_SIZE_64 3
158 #define USBA_EPT_SIZE_128 4
159 #define USBA_EPT_SIZE_256 5
160 #define USBA_EPT_SIZE_512 6
161 #define USBA_EPT_SIZE_1024 7
162
163 /* Constants for EPT_TYPE */
164 #define USBA_EPT_TYPE_CONTROL 0
165 #define USBA_EPT_TYPE_ISO 1
166 #define USBA_EPT_TYPE_BULK 2
167 #define USBA_EPT_TYPE_INT 3
168
169 /* Constants for BK_NUMBER */
170 #define USBA_BK_NUMBER_ZERO 0
171 #define USBA_BK_NUMBER_ONE 1
172 #define USBA_BK_NUMBER_DOUBLE 2
173 #define USBA_BK_NUMBER_TRIPLE 3
174
175 /* Bit manipulation macros */
176 #define USBA_BF(name, value) \
177 (((value) & ((1 << USBA_##name##_SIZE) - 1)) \
178 << USBA_##name##_OFFSET)
179 #define USBA_BFEXT(name, value) \
180 (((value) >> USBA_##name##_OFFSET) \
181 & ((1 << USBA_##name##_SIZE) - 1))
182 #define USBA_BFINS(name, value, old) \
183 (((old) & ~(((1 << USBA_##name##_SIZE) - 1) \
184 << USBA_##name##_OFFSET)) \
185 | USBA_BF(name, value))
186
187 /* Register access macros */
188 #define usba_readl(udc, reg) \
189 readl_relaxed((udc)->regs + USBA_##reg)
190 #define usba_writel(udc, reg, value) \
191 writel_relaxed((value), (udc)->regs + USBA_##reg)
192 #define usba_ep_readl(ep, reg) \
193 readl_relaxed((ep)->ep_regs + USBA_EPT_##reg)
194 #define usba_ep_writel(ep, reg, value) \
195 writel_relaxed((value), (ep)->ep_regs + USBA_EPT_##reg)
196 #define usba_dma_readl(ep, reg) \
197 readl_relaxed((ep)->dma_regs + USBA_DMA_##reg)
198 #define usba_dma_writel(ep, reg, value) \
199 writel_relaxed((value), (ep)->dma_regs + USBA_DMA_##reg)
200
201 /* Calculate base address for a given endpoint or DMA controller */
202 #define USBA_EPT_BASE(x) (0x100 + (x) * 0x20)
203 #define USBA_DMA_BASE(x) (0x300 + (x) * 0x10)
204 #define USBA_FIFO_BASE(x) ((x) << 16)
205
206 /* Synth parameters */
207 #define USBA_NR_DMAS 7
208
209 #define EP0_FIFO_SIZE 64
210 #define EP0_EPT_SIZE USBA_EPT_SIZE_64
211 #define EP0_NR_BANKS 1
212
213 #define FIFO_IOMEM_ID 0
214 #define CTRL_IOMEM_ID 1
215
216 #define DBG_ERR 0x0001 /* report all error returns */
217 #define DBG_HW 0x0002 /* debug hardware initialization */
218 #define DBG_GADGET 0x0004 /* calls to/from gadget driver */
219 #define DBG_INT 0x0008 /* interrupts */
220 #define DBG_BUS 0x0010 /* report changes in bus state */
221 #define DBG_QUEUE 0x0020 /* debug request queue processing */
222 #define DBG_FIFO 0x0040 /* debug FIFO contents */
223 #define DBG_DMA 0x0080 /* debug DMA handling */
224 #define DBG_REQ 0x0100 /* print out queued request length */
225 #define DBG_ALL 0xffff
226 #define DBG_NONE 0x0000
227
228 #define DEBUG_LEVEL (DBG_ERR)
229
230 #define DBG(level, fmt, ...) \
231 do { \
232 if ((level) & DEBUG_LEVEL) \
233 pr_debug("udc: " fmt, ## __VA_ARGS__); \
234 } while (0)
235
236 enum usba_ctrl_state {
237 WAIT_FOR_SETUP,
238 DATA_STAGE_IN,
239 DATA_STAGE_OUT,
240 STATUS_STAGE_IN,
241 STATUS_STAGE_OUT,
242 STATUS_STAGE_ADDR,
243 STATUS_STAGE_TEST,
244 };
245 /*
246 EP_STATE_IDLE,
247 EP_STATE_SETUP,
248 EP_STATE_IN_DATA,
249 EP_STATE_OUT_DATA,
250 EP_STATE_SET_ADDR_STATUS,
251 EP_STATE_RX_STATUS,
252 EP_STATE_TX_STATUS,
253 EP_STATE_HALT,
254 */
255
256 struct usba_dma_desc {
257 dma_addr_t next;
258 dma_addr_t addr;
259 u32 ctrl;
260 };
261
262 struct usba_fifo_cfg {
263 u8 hw_ep_num;
264 u16 fifo_size;
265 u8 nr_banks;
266 };
267
268 struct usba_ep {
269 int state;
270 void __iomem *ep_regs;
271 void __iomem *dma_regs;
272 void __iomem *fifo;
273 char name[8];
274 struct usb_ep ep;
275 struct usba_udc *udc;
276
277 struct list_head queue;
278
279 u16 fifo_size;
280 u8 nr_banks;
281 u8 index;
282 unsigned int can_dma:1;
283 unsigned int can_isoc:1;
284 unsigned int is_isoc:1;
285 unsigned int is_in:1;
286 unsigned long ept_cfg;
287 #ifdef CONFIG_USB_GADGET_DEBUG_FS
288 u32 last_dma_status;
289 struct dentry *debugfs_dir;
290 #endif
291 };
292
293 struct usba_request {
294 struct usb_request req;
295 struct list_head queue;
296
297 u32 ctrl;
298
299 unsigned int submitted:1;
300 unsigned int last_transaction:1;
301 unsigned int using_dma:1;
302 unsigned int mapped:1;
303 };
304
305 struct usba_udc_errata {
306 void (*toggle_bias)(struct usba_udc *udc, int is_on);
307 void (*pulse_bias)(struct usba_udc *udc);
308 };
309
310 struct usba_udc {
311 /* Protect hw registers from concurrent modifications */
312 spinlock_t lock;
313
314 /* Mutex to prevent concurrent start or stop */
315 struct mutex vbus_mutex;
316
317 void __iomem *regs;
318 void __iomem *fifo;
319
320 struct usb_gadget gadget;
321 struct usb_gadget_driver *driver;
322 struct platform_device *pdev;
323 const struct usba_udc_errata *errata;
324 int irq;
325 struct gpio_desc *vbus_pin;
326 int num_ep;
327 int configured_ep;
328 struct usba_fifo_cfg *fifo_cfg;
329 struct clk *pclk;
330 struct clk *hclk;
331 struct usba_ep *usba_ep;
332 bool bias_pulse_needed;
333 bool clocked;
334
335 u16 devstatus;
336
337 u16 test_mode;
338 int vbus_prev;
339
340 u32 int_enb_cache;
341
342 #ifdef CONFIG_USB_GADGET_DEBUG_FS
343 struct dentry *debugfs_root;
344 #endif
345
346 struct regmap *pmc;
347 };
348
to_usba_ep(struct usb_ep * ep)349 static inline struct usba_ep *to_usba_ep(struct usb_ep *ep)
350 {
351 return container_of(ep, struct usba_ep, ep);
352 }
353
to_usba_req(struct usb_request * req)354 static inline struct usba_request *to_usba_req(struct usb_request *req)
355 {
356 return container_of(req, struct usba_request, req);
357 }
358
to_usba_udc(struct usb_gadget * gadget)359 static inline struct usba_udc *to_usba_udc(struct usb_gadget *gadget)
360 {
361 return container_of(gadget, struct usba_udc, gadget);
362 }
363
364 #define ep_is_control(ep) ((ep)->index == 0)
365 #define ep_is_idle(ep) ((ep)->state == EP_STATE_IDLE)
366
367 #endif /* __LINUX_USB_GADGET_USBA_UDC_H */
368
