Searched refs:TTM_PL_MASK_CACHING (Results 1 – 17 of 17) sorted by relevance
70 #define TTM_PL_MASK_CACHING (TTM_PL_FLAG_CACHED | \ macro74 #define TTM_PL_MASK_MEMTYPE (TTM_PL_MASK_MEM | TTM_PL_MASK_CACHING)
217 man->available_caching = TTM_PL_MASK_CACHING; in virtio_gpu_init_mem_type()223 man->available_caching = TTM_PL_MASK_CACHING; in virtio_gpu_init_mem_type()239 .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM, in virtio_gpu_evict_flags()
55 TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT | pflag; in virtio_gpu_init_ttm_placement()
118 man->available_caching = TTM_PL_MASK_CACHING; in vbox_bo_init_mem_type()294 TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in vbox_ttm_placement()297 TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in vbox_ttm_placement()
120 man->available_caching = TTM_PL_MASK_CACHING; in mgag200_bo_init_mem_type()289 bo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in mgag200_ttm_placement()291 bo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in mgag200_ttm_placement()
120 man->available_caching = TTM_PL_MASK_CACHING; in cirrus_bo_init_mem_type()293 bo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in cirrus_ttm_placement()295 bo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in cirrus_ttm_placement()
163 man->available_caching = TTM_PL_MASK_CACHING; in qxl_init_mem_type()173 man->available_caching = TTM_PL_MASK_CACHING; in qxl_init_mem_type()190 .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM in qxl_evict_flags()
66 qbo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM | pflag; in qxl_ttm_placement_from_domain()68 qbo->placements[c++].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in qxl_ttm_placement_from_domain()
101 man->available_caching = TTM_PL_MASK_CACHING; in hibmc_bo_init_mem_type()130 bo->placements[count++].flags = TTM_PL_MASK_CACHING | in hibmc_ttm_placement()133 bo->placements[count++].flags = TTM_PL_MASK_CACHING | in hibmc_ttm_placement()
96 man->available_caching = TTM_PL_MASK_CACHING; in bochs_bo_init_mem_type()259 bo->placements[c++].flags = TTM_PL_MASK_CACHING in bochs_ttm_placement()263 bo->placements[c++].flags = TTM_PL_MASK_CACHING in bochs_ttm_placement()
138 man->available_caching = TTM_PL_MASK_CACHING; in radeon_init_mem_type()144 man->available_caching = TTM_PL_MASK_CACHING; in radeon_init_mem_type()184 .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM in radeon_evict_flags()331 placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; in radeon_move_vram_ram()378 placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; in radeon_move_ram_vram()
162 rbo->placements[c++].flags = TTM_PL_MASK_CACHING | in radeon_ttm_placement_from_domain()
363 TTM_PL_MASK_CACHING) | in nouveau_bo_placement_set()636 man->available_caching = TTM_PL_MASK_CACHING; in nouveau_bo_init_mem_type()678 man->available_caching = TTM_PL_MASK_CACHING; in nouveau_bo_init_mem_type()1206 .flags = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING in nouveau_bo_move_flipd()1243 .flags = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING in nouveau_bo_move_flips()
238 ((mem->placement & bo->mem.placement & TTM_PL_MASK_CACHING) == 0)) { in ttm_bo_handle_move_mem()844 uint32_t caching = proposed_placement & TTM_PL_MASK_CACHING; in ttm_bo_select_caching()845 uint32_t result = proposed_placement & ~TTM_PL_MASK_CACHING; in ttm_bo_select_caching()1049 if ((*new_flags & mem->placement & TTM_PL_MASK_CACHING) && in ttm_bo_places_compat()
184 man->available_caching = TTM_PL_MASK_CACHING; in amdgpu_init_mem_type()191 man->available_caching = TTM_PL_MASK_CACHING; in amdgpu_init_mem_type()237 .flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM in amdgpu_evict_flags()566 placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; in amdgpu_move_vram_ram()624 placements.flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; in amdgpu_move_ram_vram()
215 places[c].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; in amdgpu_bo_placement_from_domain()
120 man->available_caching = TTM_PL_MASK_CACHING; in ast_bo_init_mem_type()