Searched refs:TSR_WIS (Results 1 – 6 of 6) sorted by relevance
125 mtspr(SPRN_TSR, TSR_ENW|TSR_WIS); in __booke_wdt_ping()
596 if ((vcpu->arch.tsr & (TSR_ENW | TSR_WIS)) != (TSR_ENW | TSR_WIS)) in arm_next_watchdog()624 if (tsr & TSR_WIS) in kvmppc_watchdog_func()627 new_tsr = tsr | TSR_WIS; in kvmppc_watchdog_func()633 if (new_tsr & TSR_WIS) { in kvmppc_watchdog_func()667 if ((vcpu->arch.tcr & TCR_WIE) && (vcpu->arch.tsr & TSR_WIS)) in update_timer_ints()1385 if ((old_tsr ^ vcpu->arch.tsr) & (TSR_ENW | TSR_WIS)) in kvmppc_set_tsr()1879 if (tsr_bits & (TSR_ENW | TSR_WIS)) in kvmppc_clr_tsr_bits()
249 lis r0, (TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS)@h
185 lis r4, (TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS)@h
759 mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); in start_cpu_decrementer()
573 #define TSR_WIS 0x40000000 /* WDT Interrupt Status */ macro
