Searched refs:TOP (Results 1 – 13 of 13) sorted by relevance
6 - A TOP control block controlling the Clocks and PHY9 | HDMI TOP |<= HPD16 The HDMI TOP block only supports HPD sensing.18 TOP Block interrupt.19 Communication to the TOP Block and the Synopsys HDMI Controller is done
12 DVI1_HS ---+----------------------------- GMII_RXD3 (TOP pin)38 'TOP pins'. For pins like KEY_ROW2, the pinmux is controlled by both
193 TCON TOP208 TCON-TOP211 | TCON-TOP - HDMI215 Note that both TCON TOP references same physical unit. Both mixers can be222 - clocks: phandle to the clocks feeding the TCON TOP223 * bus: TCON TOP interface clock230 - resets: phandle to the reset line driving the TCON TOP
251 u16 TOP; /* Value: take over point */ member1678 u16 TOP, /* 0: Dual AGC; Value: take over point */ in MXL5005_TunerConfig() argument1702 state->TOP = TOP; in MXL5005_TunerConfig()1827 if (state->TOP == 55) /* TOP == 5.5 */ in MXL_BlockInit()1830 if (state->TOP == 72) /* TOP == 7.2 */ in MXL_BlockInit()1833 if (state->TOP == 92) /* TOP == 9.2 */ in MXL_BlockInit()1836 if (state->TOP == 110) /* TOP == 11.0 */ in MXL_BlockInit()1839 if (state->TOP == 129) /* TOP == 12.9 */ in MXL_BlockInit()1842 if (state->TOP == 147) /* TOP == 14.7 */ in MXL_BlockInit()1845 if (state->TOP == 168) /* TOP == 16.8 */ in MXL_BlockInit()[all …]
66 modules are power gated, except the TOP modules
75 TCON TOP is responsible for configuring display pipeline for
76 #define ETH_RSS_HASH_TOP __ETH_RSS_HASH(TOP)
87 * flash. TODO: once the flash part TOP/BOTTOM detection
66 * flash. TODO: once the flash part TOP/BOTTOM detection
106 * flash. TODO: once the flash part TOP/BOTTOM detection
638 #define COND_SEL(CODE, TOP, FOP) \ in bpf_jit_compile() argument640 t_op = TOP; \ in bpf_jit_compile()
386 SET Y=0 AT TOP
2487 _(TOP , device->top , &device->top->subdev); in nvkm_device_subdev()
