Searched refs:TEGRA124_CLK_PLL_M_UD (Results 1 – 6 of 6) sorted by relevance
343 #define TEGRA124_CLK_PLL_M_UD 313 macro
58 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;70 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;76 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;
98 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;110 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;116 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;
65 clocks = <&tegra_car TEGRA124_CLK_PLL_M_UD>;
1110 clks[TEGRA124_CLK_PLL_M_UD] = clk; in tegra124_pll_init()