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Searched refs:SZ_1K (Results 1 – 25 of 57) sorted by relevance

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/Linux-v4.19/arch/arm/mach-s3c24xx/
Dmach-jive.c105 .size = (160 * SZ_1K),
112 .offset = (176 * SZ_1K),
113 .size = (16 * SZ_1K),
120 .offset = (192 * SZ_1K),
121 .size = (SZ_2M) - (192 * SZ_1K),
140 .offset = (160 * SZ_1K),
141 .size = (16 * SZ_1K),
148 .size = (2 * SZ_1M) - (192 * SZ_1K),
151 .offset = (24 * SZ_1M) - (192*SZ_1K),
163 .size = (160 * SZ_1K),
[all …]
/Linux-v4.19/drivers/media/platform/s5p-mfc/
Dregs-mfc-v10.h45 #define MFC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
47 #define MFC_OTHER_DEC_CTX_BUF_SIZE_V10 (20 * SZ_1K)
48 #define MFC_H264_ENC_CTX_BUF_SIZE_V10 (100 * SZ_1K)
49 #define MFC_HEVC_ENC_CTX_BUF_SIZE_V10 (30 * SZ_1K)
50 #define MFC_OTHER_ENC_CTX_BUF_SIZE_V10 (15 * SZ_1K)
Dregs-mfc-v7.h46 #define MFC_CTX_BUF_SIZE_V7 (30 * SZ_1K) /* 30KB */
48 #define MFC_OTHER_DEC_CTX_BUF_SIZE_V7 (20 * SZ_1K) /* 20KB */
49 #define MFC_H264_ENC_CTX_BUF_SIZE_V7 (100 * SZ_1K) /* 100KB */
50 #define MFC_OTHER_ENC_CTX_BUF_SIZE_V7 (10 * SZ_1K) /* 10KB */
Dregs-mfc-v8.h95 #define MFC_CTX_BUF_SIZE_V8 (36 * SZ_1K) /* 36KB */
97 #define MFC_OTHER_DEC_CTX_BUF_SIZE_V8 (20 * SZ_1K) /* 20KB */
98 #define MFC_H264_ENC_CTX_BUF_SIZE_V8 (100 * SZ_1K) /* 100KB */
99 #define MFC_OTHER_ENC_CTX_BUF_SIZE_V8 (10 * SZ_1K) /* 10KB */
Dregs-mfc.h440 #define FIRMWARE_ALIGN (128 * SZ_1K) /* 128KB */
441 #define MFC_H264_CTX_BUF_SIZE (600 * SZ_1K) /* 600KB per H264 instance */
442 #define MFC_CTX_BUF_SIZE (10 * SZ_1K) /* 10KB per instance */
443 #define DESC_BUF_SIZE (128 * SZ_1K) /* 128KB for DESC buffer */
444 #define SHARED_BUF_SIZE (8 * SZ_1K) /* 8KB for shared buffer */
446 #define DEF_CPB_SIZE (256 * SZ_1K) /* 256KB */
448 #define MAX_FW_SIZE (384 * SZ_1K)
Dregs-mfc-v6.h399 #define MFC_CTX_BUF_SIZE_V6 (28 * SZ_1K) /* 28KB */
401 #define MFC_OTHER_DEC_CTX_BUF_SIZE_V6 (20 * SZ_1K) /* 20KB */
402 #define MFC_H264_ENC_CTX_BUF_SIZE_V6 (100 * SZ_1K) /* 100KB */
403 #define MFC_OTHER_ENC_CTX_BUF_SIZE_V6 (12 * SZ_1K) /* 12KB */
/Linux-v4.19/drivers/mtd/nand/raw/
Dnand_ids.c43 SZ_4K, SZ_1K, SZ_256K, 0, 8, 232, NAND_ECC_INFO(4, SZ_512) },
46 SZ_8K, SZ_4K, SZ_1M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
49 SZ_8K, SZ_8K, SZ_2M, 0, 8, 640, NAND_ECC_INFO(40, SZ_1K) },
52 SZ_16K, SZ_8K, SZ_4M, 0, 6, 1280, NAND_ECC_INFO(40, SZ_1K) },
56 NAND_ECC_INFO(40, SZ_1K), 4 },
/Linux-v4.19/include/linux/
Dbcm963xx_nvram.h19 #define BCM963XX_NVRAM_V5_SIZE (1 * SZ_1K)
58 return nvram->nand_part_offset[part] * SZ_1K; in bcm963xx_nvram_nand_part_offset()
68 return nvram->nand_part_size[part] * SZ_1K; in bcm963xx_nvram_nand_part_size()
Dsizes.h24 #define SZ_1K 0x00000400 macro
/Linux-v4.19/arch/arm/mach-davinci/
Ddm646x.c253 .end = 0x01c10000 + SZ_1K - 1,
259 .end = 0x01c10400 + SZ_1K - 1,
265 .end = 0x01c10800 + SZ_1K - 1,
271 .end = 0x01c10c00 + SZ_1K - 1,
301 .end = DAVINCI_DM646X_MCASP0_REG_BASE + (SZ_1K << 1) - 1,
333 .end = DAVINCI_DM646X_MCASP1_REG_BASE + (SZ_1K << 1) - 1,
649 pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); in dm646x_init_time()
663 .end = DAVINCI_PLL2_BASE + SZ_1K - 1,
Ddm365.c461 .end = 0x01c10000 + SZ_1K - 1,
467 .end = 0x01c10400 + SZ_1K - 1,
473 .end = 0x01c10800 + SZ_1K - 1,
479 .end = 0x01c10c00 + SZ_1K - 1,
534 .end = DAVINCI_DM365_VC_BASE + SZ_1K - 1,
559 .end = DM365_RTC_BASE + SZ_1K - 1,
588 .end = DM365_KEYSCAN_BASE + SZ_1K - 1,
742 pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); in dm365_init_time()
745 pll2 = ioremap(DAVINCI_PLL2_BASE, SZ_1K); in dm365_init_time()
Ddevices-da8xx.c163 .end = DA8XX_TPTC0_BASE + SZ_1K - 1,
169 .end = DA8XX_TPTC1_BASE + SZ_1K - 1,
194 .end = DA850_TPTC2_BASE + SZ_1K - 1,
454 .end = DAVINCI_DA830_MCASP1_REG_BASE + (SZ_1K * 12) - 1,
489 .end = DAVINCI_DA830_MCASP2_REG_BASE + (SZ_1K * 12) - 1,
524 .end = DAVINCI_DA8XX_MCASP0_REG_BASE + (SZ_1K * 12) - 1,
Ddm644x.c252 .end = 0x01c10000 + SZ_1K - 1,
258 .end = 0x01c10400 + SZ_1K - 1,
655 pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); in dm644x_init_time()
669 .end = DAVINCI_PLL2_BASE + SZ_1K - 1,
Ddm355.c265 .end = 0x01c10000 + SZ_1K - 1,
271 .end = 0x01c10400 + SZ_1K - 1,
709 pll1 = ioremap(DAVINCI_PLL1_BASE, SZ_1K); in dm355_init_time()
723 .end = DAVINCI_PLL2_BASE + SZ_1K - 1,
/Linux-v4.19/fs/btrfs/tests/
Dfree-space-tests.c459 SZ_128M + 768 * SZ_1K, in test_steal_space_from_bitmap_to_extent()
460 SZ_128M - 768 * SZ_1K); in test_steal_space_from_bitmap_to_extent()
480 if (test_check_exists(cache, SZ_128M + 768 * SZ_1K, in test_steal_space_from_bitmap_to_extent()
481 SZ_128M - 768 * SZ_1K)) { in test_steal_space_from_bitmap_to_extent()
668 ret = btrfs_remove_free_space(cache, 0, SZ_128M - 768 * SZ_1K); in test_steal_space_from_bitmap_to_extent()
679 if (!test_check_exists(cache, SZ_128M - 768 * SZ_1K, SZ_256K)) { in test_steal_space_from_bitmap_to_extent()
688 if (test_check_exists(cache, 0, SZ_128M - 768 * SZ_1K)) { in test_steal_space_from_bitmap_to_extent()
777 if (!test_check_exists(cache, SZ_128M - 768 * SZ_1K, SZ_1M)) { in test_steal_space_from_bitmap_to_extent()
789 if (offset != (SZ_128M - 768 * SZ_1K)) { in test_steal_space_from_bitmap_to_extent()
Dextent-map-tests.c129 em->len = SZ_1K; in test_case_2()
155 em->len = SZ_1K; in test_case_2()
162 (em->start != 0 || extent_map_end(em) != SZ_1K || in test_case_2()
/Linux-v4.19/arch/unicore32/mm/
Dinit.c357 DIV_ROUND_UP(PAGE_SIZE, SZ_1K), in mem_init()
366 DIV_ROUND_UP((__init_end - __init_begin), SZ_1K), in mem_init()
368 DIV_ROUND_UP((_etext - _stext), SZ_1K), in mem_init()
370 DIV_ROUND_UP((_edata - _sdata), SZ_1K)); in mem_init()
/Linux-v4.19/arch/arm/mach-tegra/
Dirammap.h24 #define TEGRA_IRAM_RESET_HANDLER_SIZE SZ_1K
Diomap.h83 #define TEGRA_EMC_SIZE SZ_1K
/Linux-v4.19/arch/arm/mach-orion5x/
Ddb88f5281-setup.c47 #define DB88F5281_7SEG_SIZE SZ_1K
61 #define DB88F5281_NAND_SIZE SZ_1K
/Linux-v4.19/arch/arm/mach-clps711x/
Dboard-dt.c36 .length = 48 * SZ_1K,
/Linux-v4.19/fs/btrfs/
Dsend.h16 #define BTRFS_SEND_READ_SIZE (48 * SZ_1K)
/Linux-v4.19/arch/arm/mach-omap2/
Domap-secure.h32 #define OMAP_SECURE_RAM_STORAGE (88 * SZ_1K)
Domap_phy_internal.c55 ctrl_base = ioremap(OMAP443X_SCM_BASE, SZ_1K); in omap4430_phy_power_down()
/Linux-v4.19/arch/arm/mach-omap1/
Dtimer32k.c179 base = ioremap(OMAP1_32KSYNC_TIMER_BASE, SZ_1K); in omap_32k_timer_init()

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