Searched refs:SUPER_CCLK_DIVIDER (Results 1 – 1 of 1) sorted by relevance
86 #define SUPER_CCLK_DIVIDER 0x24 macro969 readl(clk_base + SUPER_CCLK_DIVIDER); in tegra20_cpu_clock_suspend()1004 clk_base + SUPER_CCLK_DIVIDER); in tegra20_cpu_clock_resume()
