Searched refs:ST_CLK_48M (Results 1 – 1 of 1) sorted by relevance
23 #define ST_CLK_48M 0 macro40 hws[ST_CLK_48M] = clk_hw_register_fixed_rate(NULL, "clk48MHz", NULL, 0, in st_clk_probe()49 clk_set_parent(hws[ST_CLK_MUX]->clk, hws[ST_CLK_48M]->clk); in st_clk_probe()
