Searched refs:SSCR1_RFT (Results 1 – 3 of 3) sorted by relevance
94 #define SSCR1_RFT (0x00003c00) /* Receive FIFO Threshold (mask) */ macro
57 | SSCR1_RFT | SSCR1_TFT | SSCR1_MWDS \251 mask = SSCR1_RFT; in pxa2xx_spi_clear_rx_thre()581 sccr1_reg &= ~SSCR1_RFT; in reset_sccr1()1286 chip->threshold = (SSCR1_RxTresh(rx_thres) & SSCR1_RFT) | in setup()
445 SSCR1_RWOT | SSCR1_TRAIL | SSCR1_TFT | SSCR1_RFT); in pxa_ssp_configure_dai_fmt()
