Searched refs:SSB_TMSLOW_CLOCK (Results 1 – 3 of 3) sorted by relevance
997 val &= SSB_TMSLOW_CLOCK | SSB_TMSLOW_RESET | reject; in ssb_device_is_enabled()999 return (val == SSB_TMSLOW_CLOCK); in ssb_device_is_enabled()1021 SSB_TMSLOW_RESET | SSB_TMSLOW_CLOCK | in ssb_device_enable()1036 SSB_TMSLOW_CLOCK | SSB_TMSLOW_FGC | in ssb_device_enable()1040 ssb_write32(dev, SSB_TMSLOW, SSB_TMSLOW_CLOCK | in ssb_device_enable()1081 if (ssb_read32(dev, SSB_TMSLOW) & SSB_TMSLOW_CLOCK) { in ssb_device_disable()1082 ssb_write32(dev, SSB_TMSLOW, reject | SSB_TMSLOW_CLOCK); in ssb_device_disable()1095 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | in ssb_device_disable()
267 SSB_IMSTATE_REJECT | SSB_TMSLOW_CLOCK); in brcmf_chip_sb_iscoreup()268 return SSB_TMSLOW_CLOCK == regdata; in brcmf_chip_sb_iscoreup()300 if ((val & SSB_TMSLOW_CLOCK) != 0) { in brcmf_chip_sb_coredisable()334 val = SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | in brcmf_chip_sb_coredisable()412 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK | in brcmf_chip_sb_resetcore()430 SSB_TMSLOW_FGC | SSB_TMSLOW_CLOCK); in brcmf_chip_sb_resetcore()436 SSB_TMSLOW_CLOCK); in brcmf_chip_sb_resetcore()
103 #define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */ macro
