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Searched refs:SPRN_L2CR (Results 1 – 5 of 5) sorted by relevance

/Linux-v4.19/arch/powerpc/platforms/powermac/
Dcache.S104 mfspr r5,SPRN_L2CR
110 1: mtspr SPRN_L2CR,r3
144 1: mtspr SPRN_L2CR,r5
156 mtspr SPRN_L2CR,r4
161 1: mfspr r3,SPRN_L2CR
168 mtspr SPRN_L2CR,r4
275 mfspr r3,SPRN_L2CR
282 1: mtspr SPRN_L2CR,r0 /* lock the L2 cache */
294 mtspr SPRN_L2CR,r0 /* set the hardware flush bit */
295 3: mfspr r0,SPRN_L2CR /* wait for it to go to 0 */
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/Linux-v4.19/arch/powerpc/kernel/
Dl2cr_6xx.S135 mfspr r4,SPRN_L2CR
209 mtspr SPRN_L2CR,r3
222 mtspr SPRN_L2CR,r3
229 10: mfspr r3,SPRN_L2CR
236 3: mfspr r3,SPRN_L2CR
242 mtspr SPRN_L2CR,r3
251 mtspr SPRN_L2CR,r3
282 mfspr r3,SPRN_L2CR
Dcpu_setup_6xx.S267 mfspr r3,SPRN_L2CR
/Linux-v4.19/arch/powerpc/kvm/
Dbook3s_emulate.c819 case SPRN_L2CR: in kvmppc_core_emulate_mtspr_pr()
983 case SPRN_L2CR: in kvmppc_core_emulate_mfspr_pr()
/Linux-v4.19/arch/powerpc/include/asm/
Dreg.h647 #define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Register */ macro