Searched refs:SOUTH_DSPCLK_GATE_D (Results 1 – 5 of 5) sorted by relevance
164 val = I915_READ(SOUTH_DSPCLK_GATE_D); in pch_gmbus_clock_gating()169 I915_WRITE(SOUTH_DSPCLK_GATE_D, val); in pch_gmbus_clock_gating()
8399 I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE); in ibx_init_clock_gating()8497 I915_WRITE(SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE | in cpt_init_clock_gating()8652 I915_WRITE(SOUTH_DSPCLK_GATE_D, in lpt_init_clock_gating()8653 I915_READ(SOUTH_DSPCLK_GATE_D) | in lpt_init_clock_gating()8665 uint32_t val = I915_READ(SOUTH_DSPCLK_GATE_D); in lpt_suspend_hw()8668 I915_WRITE(SOUTH_DSPCLK_GATE_D, val); in lpt_suspend_hw()8711 I915_WRITE(SOUTH_DSPCLK_GATE_D, I915_READ(SOUTH_DSPCLK_GATE_D) | in cnp_init_clock_gating()
9167 val = I915_READ(SOUTH_DSPCLK_GATE_D); in hsw_enable_pc8()9169 I915_WRITE(SOUTH_DSPCLK_GATE_D, val); in hsw_enable_pc8()9186 val = I915_READ(SOUTH_DSPCLK_GATE_D); in hsw_disable_pc8()9188 I915_WRITE(SOUTH_DSPCLK_GATE_D, val); in hsw_disable_pc8()
8074 #define SOUTH_DSPCLK_GATE_D _MMIO(0xc2020) macro
2261 MMIO_D(SOUTH_DSPCLK_GATE_D, D_ALL); in init_generic_mmio_info()
