Searched refs:SOR_PLL3_PLL_VDD_MODE_3V3 (Results 1 – 2 of 2) sorted by relevance
132 #define SOR_PLL3_PLL_VDD_MODE_3V3 (1 << 13) macro
1656 value |= SOR_PLL3_PLL_VDD_MODE_3V3; in tegra_sor_edp_enable()2241 value &= ~SOR_PLL3_PLL_VDD_MODE_3V3; in tegra_sor_hdmi_enable()
