Searched refs:SOR_DP_PADCTL_PD_TXD_2 (Results 1 – 2 of 2) sorted by relevance
292 #define SOR_DP_PADCTL_PD_TXD_2 (1 << 0) macro
1128 SOR_DP_PADCTL_PD_TXD_1 | SOR_DP_PADCTL_PD_TXD_2); in tegra_sor_power_down()1757 value &= ~(SOR_DP_PADCTL_PD_TXD_3 | SOR_DP_PADCTL_PD_TXD_2); in tegra_sor_edp_enable()1759 value |= SOR_DP_PADCTL_PD_TXD_3 | SOR_DP_PADCTL_PD_TXD_2; in tegra_sor_edp_enable()2264 SOR_DP_PADCTL_PD_TXD_1 | SOR_DP_PADCTL_PD_TXD_2; in tegra_sor_hdmi_enable()