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Searched refs:SKL_PS_WIN_POS (Results 1 – 4 of 4) sorted by relevance

/Linux-v4.19/drivers/gpu/drm/i915/gvt/
Dhandlers.c2857 MMIO_DH(SKL_PS_WIN_POS(PIPE_A, 0), D_SKL_PLUS, NULL, pf_write); in init_skl_mmio_info()
2858 MMIO_DH(SKL_PS_WIN_POS(PIPE_A, 1), D_SKL_PLUS, NULL, pf_write); in init_skl_mmio_info()
2859 MMIO_DH(SKL_PS_WIN_POS(PIPE_B, 0), D_SKL_PLUS, NULL, pf_write); in init_skl_mmio_info()
2860 MMIO_DH(SKL_PS_WIN_POS(PIPE_B, 1), D_SKL_PLUS, NULL, pf_write); in init_skl_mmio_info()
2861 MMIO_DH(SKL_PS_WIN_POS(PIPE_C, 0), D_SKL_PLUS, NULL, pf_write); in init_skl_mmio_info()
2862 MMIO_DH(SKL_PS_WIN_POS(PIPE_C, 1), D_SKL_PLUS, NULL, pf_write); in init_skl_mmio_info()
/Linux-v4.19/drivers/gpu/drm/i915/
Dintel_sprite.c314 I915_WRITE_FW(SKL_PS_WIN_POS(pipe, scaler_id), (crtc_x << 16) | crtc_y); in skl_update_plane()
Dintel_display.c3441 I915_WRITE(SKL_PS_WIN_POS(intel_crtc->pipe, id), 0); in skl_detach_scaler()
5003 I915_WRITE(SKL_PS_WIN_POS(pipe, id), crtc->config->pch_pfit.pos); in skylake_pfit_enable()
8734 pipe_config->pch_pfit.pos = I915_READ(SKL_PS_WIN_POS(crtc->pipe, i)); in skylake_get_pfit_config()
Di915_reg.h6953 #define SKL_PS_WIN_POS(pipe, id) _MMIO_PIPE(pipe, \ macro