Searched refs:SH_MEM_BASES (Results 1 – 4 of 4) sorted by relevance
967 radeon_ring_write(ring, SH_MEM_BASES >> 2); in cik_dma_vm_flush()
1163 #define SH_MEM_BASES 0x8C28 macro
5520 WREG32(SH_MEM_BASES, 0); in cik_pcie_gart_enable()5717 radeon_ring_write(ring, SH_MEM_BASES >> 2); in cik_vm_flush()
1792 tmp = REG_SET_FIELD(0, SH_MEM_BASES, PRIVATE_BASE, in gfx_v9_0_gpu_init()1794 tmp = REG_SET_FIELD(tmp, SH_MEM_BASES, SHARED_BASE, in gfx_v9_0_gpu_init()
