Searched refs:SDCDIV (Results 1 – 1 of 1) sorted by relevance
66 #define SDCDIV 0x0c /* Start value for clock divider - 11 R/W */ macro240 dev_dbg(dev, "SDCDIV 0x%08x\n", readl(host->ioaddr + SDCDIV)); in bcm2835_dumpregs()262 writel(0, host->ioaddr + SDCDIV); in bcm2835_reset_internal()280 writel(host->cdiv, host->ioaddr + SDCDIV); in bcm2835_reset_internal()1127 writel(host->cdiv, host->ioaddr + SDCDIV); in bcm2835_set_clock()1150 writel(host->cdiv, host->ioaddr + SDCDIV); in bcm2835_set_clock()
